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  • Welcome
  • Product Introduction
    • PLC features
    • Programming software features
  • Quick Start
    • General step of programming
    • First step: Programming software
    • Second step: New project
    • Third step: Write control program
    • Fourth step: PLC hardware configure
    • Fifth step: Off line simulate debug
    • Sixth step: Online with PLC
    • Seventh step: Download program
    • Eighth step: Start PLC
  • PLC Register and Data
    • Overview
    • Data
    • Component overview
    • External input relay [X]
    • External output relay [Y]
    • Timer [T]
    • Counter[C]
    • Auxiliary relay[M]
    • Step relay[S]
    • System status bit [SM]
    • Local relay [LM]
    • Analog input register [AI]
    • Analog output register [AQ]
    • Current value of timer [TV]
    • Current value of counter [CV]
    • Internal data register [V]
    • System register [SV]
    • Local register [LV]
    • Indexed addressing point [P]
  • PLC instruction set
    • General declare of the instruction
    • Compare switch
    • Step instruction
      • STL (Step start)
      • SFROM (Step combine)
      • STO (Step jump)
    • Bit instruction
      • AND(Logic AND)
      • OR(Logic OR)
      • XOR(Logic XOR)
      • OUT(Coil output)
      • SET(Setting)
      • RST(Reset)
      • ALT(ON/OFF alternately output)
      • ZRST(Batch reset)
      • ENO(Get ENO output)
    • Timer
      • TON(Delay ON)
      • TOF(Delay OFF)
      • TP(Pulse timer)
    • Counter
      • CTU. D.CTU(Increase counter)
      • CTD. D.CTD(Decrease counter)
      • CTUD. D.CTUD(Increase and Decrease counter)
    • High speed control instruction
      • SHC (Single high counter)
      • HHSC (High speed counter )
      • HCWR (Write high speed counter)
      • SPD (Speed detection )
      • PWM (Pulse width modulation)
      • PLSY. D.PLSY (Pulse output)
      • PLSR. D.PLSR( Accelerate and decelerate pulse output)
      • ZRN (Origin point return)
      • SETZ (Set electric origin point)
      • PPMR (Linear interpolation)
      • CIMR (Circular interpolation )
      • SPLS (Single pulse output)
      • MPTO (Multi-segment pulse output)
      • SYNP (Synchronization pulse output)
      • PSTOP (Stop pulse output)
      • DVIT (Interrupt positioning pulse output)
      • ECAM (Electronic CAM)
      • JOGP (Jog pulse output)
    • Compare instruction
      • CMP. D.CMP(Compare)
      • ZCP. D.ZCP(Regional comparison)
      • MATC. D.MATC(Numerical match)
      • ABSC. D.ABSC(Absolute cam comparison)
      • BON(ON bit determine)
      • BONC. D.BONC(ON bit numbers)
      • MAX. D.MAX(Maximum)
      • MIN. D.MIN(Minimum)
      • SEL. D.SEL(Selection of conditions)
      • MUX. D.MUX(Multi-choice)
    • Shift instruction
      • LBST(Low byte evaluation)
      • HBST(High byte evaluation)
      • MOV. D.MOV(Move)
      • BMOV(Block move)
      • FILL(Fill)
      • XCH(Byte swap). D.XCH(Register swap)
      • BXCH(Block swap)
      • SHL(Bit left shift)
      • SHR(Bit right shift)
      • WSHL(Word left shift)
      • WSHR(Word right shift)
      • ROL(Bit rotate left shift)
      • ROR(Bit rotate right shift)
      • WROL(Word rotate left shift)
      • WROR(Word rotate right shift)
      • BSHL(Byte left shift)
      • BSHR(Byte right shift)
      • ATBL(Append to array)
      • FIFO(First in first out)
      • LIFO(Last in first out)
      • SORT(Data sort)
    • Data conversion instruction
      • ENCO(Encoder)
      • DECO(Decoder)
      • BTOW(Bit convert to word)
      • WTOB (Word convert to bit)
      • HEX. HEX.LB(ASCII convert to hexadecimal)
      • ASCI. ASCI.LB(Hexadecimal convert to ASCII)
      • BUNB(Discrete bit combination to continuous bit)
      • BUNW(Discrete bit combination to continuous word)
      • WUNW(Discrete word combination to continuous word)
      • BDIB(Continuous bit disperse to discrete bit)
      • WDIB(Continuous word disperse to discrete bit)
      • WDIW(Continuous word disperse to discrete word)
      • BCD. D.BCD(BIN convert to BCD)
      • BIN. D.BIN(BCD convert to BIN)
      • ITOL(Integer convert to long integer)
      • GRAY(BIN convert to GRAY code)
      • GBIN(GRAY code convert to BIN)
    • Character instruction
      • GHLB(Obtain high low byte)
      • GETB(Capture byte string)
      • BCMP. BCMP.LB(Byte string comparison)
      • ITOC. D.ITOC(Integer convert to character)
      • CTOI(Character convert to integer)
      • FTOC(Floating point convert to character)
      • CTOF(Character convert to floating point)
    • Arithmetical instruction
      • WNOT. D.WNOT(Negation)
      • WAND. D.WAND(AND operation)
      • WOR. D.WOR(OR operation)
      • WXOR. D.WXOR(XOR operation)
      • ADD. D.ADD(Addition)
      • SUB. D.SUB(Subtraction)
      • INC. D.INC(Increase 1)
      • DEC. D.DEC(Decrease 1)
      • MUL. D.MUL(Multiplication)
      • DIV. D.DIV(Division)
      • ACCU. D.ACCU(Accumulation)
      • AVG. D.AVG(Average)
      • ABS. D.ABS(Absolute value)
      • NEG. D.NEG(Two's complement)
    • Floating point instruction
      • FCMP(Floating point comparison)
      • FZCP(Floating point regional comparison)
      • FMOV(Floating point move)
      • FADD(Floating point addition)
      • FSUB(Floating point subtraction)
      • FMUL(Floating point multiplication)
      • FDIV(Floating point division)
      • FACCU(Accumulation)
      • FAVG(Average)
      • FMAX(Floating point maximum)
      • FMIN(Floating point minimum)
      • FTOI(Floating point convert to integer)
      • ITOF. D.ITOF(Integer convert to floating point)
      • FABS(Floating point absolute)
      • FSQR(Floating point square root)
      • FSIN(Sine)
      • FCOS(Cosine)
      • FTAN(Tangent)
      • FASIN(Arcsine)
      • FACOS(Arc cosine)
      • FATAN(Arctangent)
      • FLN(Natural logarithm)
      • FLOG(The base-10 logarithm of a number)
      • FEXP(Nature exponential)
      • FRAD(Angle convert to radian)
      • FDEG(Radian convert to angle)
      • FXY(Exponent)
    • Clock instruction
      • TCMP(Real time clock comparison)
      • TACCU(Time accumulative total)
      • SCLK(Setup system clock)
      • TIME(Time switch)
      • DATE(Date switch)
      • INVT(Count down)
    • Communication instruction
      • SUM. SUM.LB(SUM verify)
      • BCC. BCC.LB(BCC verify)
      • CRC. CRC.LB(CRC verify)
      • LRC. LRC.LB(LRC verify)
      • COMM. COMM.LB(Serial communications)
      • MODR(Modbus read)
      • MODW(Modbus write)
      • HWRD(Haiwellbus read)
      • HWWR(Haiwellbus write)
      • RCV(Receive communication data)
      • XMT. XMT.LB(Sent communication data)
      • FROM(Extend module CR register read)
      • TO(Extend module CR register write)
      • TCPMDR(Modbus TCP read)
      • TCPMDW(Modbus TCP write)
      • TCPHWR(Haiwellbus TCP read)
      • TCPHWW(Haiwellbus TCP write)
    • Interrupt instruction
      • ATCH(Interrupt binding)
      • DTCH(Interrupt release)
      • ENI(Enable interrupt)
      • DISI(Disable interrupt)
    • Program control instruction
      • MC(Master control)
      • MCR(Master control clear)
      • FOR(Loop command)
      • NEXT(Loop end)
      • WAIT(Delay wait)
      • CALL(Call subroutine)
      • EXIT(Condition exit)
      • REWD(Scanning time reset)
      • JMPC(Condition jump)
      • LBL(Jump label)
    • Special Function instruction
      • GPWM(General pulse width modulation)
      • FTC(Fuzzy temperature control)
      • PID(PID control)
      • HAL. D.HAL(Upper limit alarm)
      • LAL. D.LAL(Lower limit alarm)
      • LIM. D.LIM(Range limitation)
      • SC. D.SC(Linear conversion)
      • VC(Valve control)
      • TTC(Temperature curve control)
      • APID(Self-tuning PID control)
  • Programming operation manual
    • Programming environment
      • Overview
      • Menu
      • Tools bar
      • Right click menu
      • Shortcut key
      • Status bar
      • Working area
      • Project manager
      • PLC resource
      • Component comment table
      • Instruction declare window
      • Instruction attribute window
      • Item define window
    • Program structure
      • Main program
      • Sub program
      • Interrupt program
    • Program project build
      • New program project
      • New program block
      • New sub program
      • Open program block
      • Delete program block
      • Program block execution sequence adjust
    • Instruction use table
      • Haiwellbus read read communication table
      • Haiwellbus write communication table
      • Disperse bit component table
      • Disperse register component table
      • Initial register value table
      • New table
      • Open table
      • Delete table
    • PLC hardware configuare
      • PLC MPU model
      • Extend block edit
      • Assign external I/O component
      • X digital input parameter
      • Y digital output parameter
      • AI analog input parameter
      • AQ analog output parameter
      • HSC high speed counter parameter
      • PLS high speed output parameter
    • LD ladder diagram programming
      • LD work area
      • Switch edit
      • Switch status change
      • LD instruction edit
      • Change status of the instruction input item
      • Branch edit
      • Network edit
    • FBD function block programming
      • FBD work area
      • FBD instruction edit
      • FBD connect between instructions
      • Change FB executed sequence
      • Change instruction input status
      • Page edit
      • FBD comment
    • IL instruction list programming
      • IL work area
      • IL instruction edit
      • Change the instruction input status
      • IL comment
    • Others
      • Find and replace
      • Compile program
      • Program and table import
      • Program and table export
      • Print and preview
      • Component used table
      • Component comment
  • Simulate and online debugging
    • Overview
    • Simulation environment
      • Simulate tools bar
      • Right-click menu
      • Hardware simulate window
      • AI/AQ simulate window
      • Data lock window
      • Real time curve window
      • Message window
    • Simulate operation
      • General steps of simulation
      • Start simulator
      • Component monitor
      • Component status table
      • Force
      • Lock data
      • Real time curve
      • Power off simulate
    • Communication simulator
      • Start communication simulator
      • Manual input slave response information
      • Use reality serial port communicate with slave
    • High speed counter simulate
    • Pulse output simulate
    • Interpolation simulate
    • Difference between online debugging and offline simulate
  • Online control PLC
    • PLC station number setting up
    • Online with PLC
    • Online PLC window
    • Download program
    • Upload program
    • Generate PLC executable file
    • Download PLC executable file
    • PLC firmware upgrade
    • Start or stop PLC
    • Clear PLC program
    • Program compare
    • PLC Diagnosis
    • Set PLC password
    • Set PLC clock
    • Set PLC communication parameter
    • Set PLC parameter
  • Networking communicate function
    • Feature
    • Networking schematic diagram
    • Modbus communication
    • Haiwellbus communication
    • Freedom communication
  • Hardware manual
    • Model table
    • PLC specification
    • Other specification
    • Extend module parameter
    • Indicator declare
    • I/O wiring diagram
    • PLC installation and precautions
  • Remote module
    • Overview
    • Module station number setting up
    • Online with module
    • Parameter modify
    • Parameter upload
    • Parameter download
    • Firmware upgrade
    • Online monitor
  • Appendix
    • SM system status bit
    • SV system register
    • Syetem interruption table
    • Communication address code table
    • Error code table
    • Programming cable wiring diagram

PLC instruction set


Haiwell PLC have a set of abundance high-efficiency instruction system, depend on absorb instructions of others PLC, support up to 200 application instructions, among there are many powerful innovate easy instructions .as commucation instructions (COMM. MODR. MODW. HWRD. HWWR). character conversion instructions (ITOC. CTOI. FTOC. CTOF). data combination disperse instructions (BUNB. BUNW. WUNW. BDIB. WDIB. WDIW). bound alarm instructions(HAL. LAL). valve control instructions(VC). temperature curve(TTC) etc.

Instruction set table as follows:

Instruction type Instruction name 8 bit model 32 bit model Instruction function Support language
LD FBD IL
Compare switch =

LB.= HB.=

D.=

Equal to compare switch, have 16 bit/32 bit /low byte/high byte model

v

<>

LB.<> HB.<>

D.<>

Unequal to compare switch, have 16 bit/32 bit /low byte/high byte model

v

>

LB.> HB.>

D.>

Greater than compare switch, have 16 bit/32 bit /low byte/high byte model

v

>=

LB.>= HB.>=

D.>=

Great than or equal to compare switch, have 16 bit/32 bit /low byte/high byte model

v

<

LB.< HB.<

D.<

Less than compare switch, have 16 bit/32 bit /low byte/high byte model

v

<=

LB.<= HB.<=

D.<=

Less than or equal to compare switch, have 16 bit/32 bit /low byte/high byte model

v

F.=

Floating-point number equal to compare switch

v

F.<>

Floating-point number unequal to compare switch

v

F.>

Floating-point number greater than compare switch

v

F.>=

Floating-point number greater than or equal to compare switch

v

F.<

Floating-point number less than compare switch

v

F.<=

Floating-point number less than or equal to compare switch

v

Step instruction STL

Step start

v

SFROM

Step combine

v

STO

Step jump

v

Bit instruction AND

Logic AND

v

v

OR

Logic OR

v

v

XOR

Logic XOR

v

v

OUT

Coil output

v

v

v

SET

Setting

v

v

v

RST

Reset

v

v

v

ALT

ON/OFF alternately output

v

v

v

ZRST

Batch reset

v

v

v

ENO

Get ENO output

v

Timer TON

Delay ON

v

v

v

TOF

Delay OFF

v

v

v

TP

Pulse timer

v

v

v

Counter CTU

D.CTU

Increase counter

v

v

v

CTD

D.CTD

Decrease counter

v

v

v

CTUD

D.CTUD

Increase and Decrease counter

v

v

v

High speed control instruction SHC

Single high speed counter

v

v

v

RESH

IO refresh

v

v

v

HHSC

High speed counter

v

v

v

HCWR

Write high speed counter

v

v

v

SPD

Speed detection

v

v

v

PWM

Pulse width modulation

v

v

v

PLSY

D.PLSY

Pulse output

v

v

v

PLSR

D.PLSR

Accelerate and decelerate pulse output

v

v

v

ZRN

Origin point return

v

v

v

SETZ

Set electric origin point

v

v

v

PPMR

Linear interpolation

v

v

v

CIMR

Circular interpolation

v

v

v

SPLS

Single pulse output

v

v

v

MPTO

Multi-segment pulse output

v

v

v

SYNP

Synchronization pulse output

v

v

v

PSTOP

Stop pulse output

v

v

v

DVIT

Synchronization pulse output

v

v

v

ECAM

Stop pulse output

v

v

v

JOGP

Jog pulse output

v

v

v

Compare instruction CMP

D.CMP

Compare instruction

v

v

v

ZCP

D.ZCP

Regional comparison

v

v

v

MATC

D.MATC

Numerical match

v

v

v

ABSC

D.ABSC

Absolute cam comparison

v

v

v

BON

ON bit determine

v

v

v

BONC D.BONC

ON bit numbers

v

v

v

MAX

D.MAX

Maximum

v

v

v

MIN

D.MIN

Minimum

v

v

v

SEL

D.SEL

Selection of conditions

v

v

v

MUX

D.MUX

Multi-choice

v

v

v

Shift instruction LBST

Low byte evaluation

v

v

v

HBST High byte evaluation

v

v

v

MOV

D.MOV

Move

v

v

v

BMOV

Block move

v

v

v

FILL

Fill

v

v

v

XCH

Byte swap

v

v

v

BXCH

Block swap

v

v

v

SHL

Bit left shift

v

v

v

SHR

Bit right shift

v

v

v

WSHL

Word left shift

v

v

v

WSHR

Word right shift

v

v

v

ROL

Bit rotate left shift

v

v

v

ROR

Bit rotate right shift

v

v

v

WROL

Word rotate left shift

v

v

v

WROR

Word rotate right shift

v

v

v

BSHL

Byte left shift

v

v

v

BSHR

Byte right shift

v

v

v

ATBL

Append to array

v

v

v

FIFO

First in first out

v

v

v

LIFO

Last in first out

v

v

v

SORT

Data sort

v

v

v

Data conversion instruction ENCO

Encoder

v

v

v

DECO

Decoder

v

v

v

BTOW

Bit convert to word

v

v

v

WTOB

Word convert to bit

v

v

v

HEX

HEX.LB

ASCII convert to hexadecimal

v

v

v

ASCI

ASCI.LB

Hexadecimal convert to ASCII

v

v

v

BUNB

Discrete bit combination to continuous bit

v

v

v

BUNW

Discrete bit combination to continuous word

v

v

v

WUNW

Discrete word combination to continuous word

v

v

v

BDIB

Continuous bit disperse to discrete bit

v

v

v

WDIB

Continuous word disperse to discrete bit

v

v

v

WDIW

Continuous word disperse to discrete word

v

v

v

BCD

D.BCD

BIN convert to BCD

v

v

v

BIN

D.BIN

BCD convert to BIN

v

v

v

ITOL

Integer convert to long integer

v

v

v

GRAY

BIN convert to GRAY code

v

v

v

GBIN

GRAY code convert to BIN

v

v

v

Character instruction GHLB Obtain high low byte

v

v

v

GETB Capture byte string

v

v

v

BCMP BCMP.LB Byte string comparison

v

v

v

ITOC

D.ITOC

Integer convert to character

v

v

v

CTOI

Character convert to integer

v

v

v

FTOC

Floating point convert to character

v

v

v

CTOF

Character convert to floating point

v

v

v

Arithmetical instruction WNOT

D.WNOT

Negation

v

v

v

WAND

D.WAND

AND operation

v

v

v

WOR

D.WOR

OR operation

v

v

v

WXOR

D.WXOR

XOR operation

v

v

v

ADD

D.ADD

Addition

v

v

v

SUB

D.SUB

Subtraction

v

v

v

INC

D.INC

Increase 1

v

v

v

DEC

D.DEC

Decrease 1

v

v

v

MUL

D.MUL

Multiplication

v

v

v

DIV

D.DIV

Division

v

v

v

ACCU

D.ACCU

Accumulation

v

v

v

AVG

D.AVG

Average

v

v

v

ABS

D.ABS

Absolute value

v

v

v

NEG

D.NEG

Two's complement

v

v

v

Floating point instruction FCMP

Floating point comparison

v

v

v

FZCP

Floating point regional comparison

v

v

v

FMOV

Floating point move instruction

v

v

v

FADD

Floating point addition

v

v

v

FSUB

Floating point subtraction

v

v

v

FMUL

Floating point multiplication

v

v

v

FDIV

Floating point division

v

v

v

FACCU

Floating point accumulation

v

v

v

FAVG

Floating point average

v

v

v

FMAX

Floating point maximum

v

v

v

FMIN

Floating point minimum

v

v

v

FTOI

Floating point convert to integer

v

v

v

ITOF

D.ITOF

Integer convert to floating point

v

v

v

FABS

Floating point absolute

v

v

v

FSQR

Floating point square root

v

v

v

FSIN

Sine

v

v

v

FCOS

Cosine

v

v

v

FTAN

Tangent

v

v

v

FASIN

Arcsine

v

v

v

FACOS

Arc cosine

v

v

v

FATAN

Arctangent

v

v

v

FLN

Natural logarithm

v

v

v

FLOG

The base-10 logarithm of a number

v

v

v

FEXP

Nature exponential

v

v

v

FRAD

Angle convert to radian

v

v

v

FDEG

Radian convert to angle

v

v

v

FXY

Exponent

v

v

v

Clock instruction TCMP

Real time clock comparison

v

v

v

TACCU

Time accumulative total

v

v

v

SCLK

Setup system clock

v

v

v

TIME

Time switch

v

v

v

DATE

Date switch

v

v

v

INVT

Count down

v

v

v

Communication instruction SUM

SUM.LB

SUM verify

v

v

v

BCC

BCC.LB

BCC verify

v

v

v

CRC

CRC.LB

CRC verify

v

v

v

LRC

LRC.LB

LRC verify

v

v

v

COMM

COMM.LB

Serial communications

v

v

v

MODR

Modbus read

v

v

v

MODW

Modbus write

v

v

v

HWRD

Haiwellbus read

v

v

v

HWWR

Haiwellbus write

v

v

v

RCV

Receive communication data

v

v

v

XMT XMT.LB

Sent communication data

v

v

v

FROM

Extend module CR register read

v

v

v

TO

Extend module CR register write

v

v

v

TCPMDR

Modbus TCP read

v

v

v

TCPMDW

Modbus TCP write

v

v

v

TCPHWR

Haiwellbus TCP read

v

v

v

TCPHWW

Haiwellbus TCP write

v

v

v

Interrupt instruction ATCH

Interrupt binding

v

v

v

DTCH

Interrupt release

v

v

v

ENI

Enable interrupt

v

v

v

DISI

Disable interrupt

v

v

v

Program control instruction MC

Master control

v

v

v

MCR

Master control clear

v

v

v

FOR

Loop command

v

v

v

NEXT

Loop end

v

v

v

WAIT

Delay wait

v

v

v

CALL

Call subroutine

v

v

v

EXIT

Condition exit

v

v

v

REWD

Scanning time reset

v

v

v

JMPC

Condition jump

v

v

v

LBL

Jump label

v

v

v

Special function instruction GPWM

General pulse width modulation

v

v

v

FTC

Fuzzy temperature control

v

v

v

PID

PID control

v

v

v

HAL

D.HAL

Upper limit alarm

v

v

v

LAL

D.LAL

Lower limit alarm

v

v

v

LIM

D.LIM

Range limitation

v

v

v

SC

D.SC

Linear conversion

v

v

v

VC

Valve control

v

v

v

TTC

Temperature curve control

v

v

v

APID

Self-tuning PID

v

v

v

General declare of the instruction


1. En enable input :En is the enable input item of the instruction, Only En have electricity (ON), the instruction executed, otherwise not executed.

2. Eno Enable output: Eno is the Enable output item of the instruction, indicate the instruction is executing. When En have electricity (ON) and instruction executed properly then Eno output have electricity (ON), when En have not electricity (OFF) or instruction executed error (e.g:parameter not property of the instruction ) then Eno output have not electricity (OFF). The application instruction in LD. FBD language, the great mass of the instruction have Eno Enable output item, All IL instructions have not Eno output item,it will be instead of the ENO instruction in IL language.

3. In LD language the AND. OR. XOR instructions, will be instead of logic link.

4. 32 bit instruction at 16 bit instruction name "D.", indicate use 2 continuous register.Such as ADD,16 bit addition is ADD,32 bit addition is D.ADD.

5. 8 bit instruction at 16 bit instruction behind the name plus ".LB", indicate only use the low byte of the register .Such as COMM,16 bit instruction is COMM,8 bit instruction is COMM.LB.

6. When the parameter items of many instruction which autoOccupy several continuous register, pay special attention to them when programming, avoid reusing the register to program execution incorrect.

Note: except CV48~CV79 are 32 bit register (total 32 entries),Haiwell PLC other registers (AI. AQ. V. SV. LV. TV. CV. P) all are 16 bit register, one 16 bit register have 2 byte compose, one 32 bit register have 2 continuous 16 bit registers compose.

Compare switch


Compare switch used in LD program language dedicated, divide into:16 bit compare instruction. 32 bit compare instruction. floating point compare instruction. low byte compare instruction. high byte compare instruction.

Compare mode have:equal to (=). unequal to (<>). greater than(>). greater than or equal to (?). less than (<). less than and equal to(?) six type.

Program example:Download,instruction list as follows:

Instruction name 8 bit model 32 bit model Instruction function Support language
LD FBD IL
=

LB.= HB.=

D.=

Equal to compare switch, have 16 bit/32 bit /low byte/high byte model

v

<>

LB.<> HB.<>

D.<>

Unequal to compare switch, have 16 bit/32 bit /low byte/high byte model

v

>

LB.> HB.>

D.>

Greater than compare switch, have 16 bit/32 bit /low byte/high byte model

v

>=

LB.>= HB.>=

D.>=

Great than or equal to compare switch, have 16 bit/32 bit /low byte/high byte model

v

<

LB.< HB.<

D.<

Less than compare switch, have 16 bit/32 bit /low byte/high byte model

v

<=

LB.<= HB.<=

D.<=

Less than or equal to compare switch, have 16 bit/32 bit /low byte/high byte model

v

F.=

Floating-point number equal to compare switch

v

F.<>

Floating-point number unequal to compare switch

v

F.>

Floating-point number greater than compare switch

v

F.>=

Floating-point number greater than or equal to compare switch

v

F.<

Floating-point number less than compare switch

v

F.<=

Floating-point number less than or equal to compare switch

v

Step instruction


Step instruction list as follows

Instruction name 8 bit model 32 bit model Instruction function Support language
LD FBD IL
STL

Step start

v

SFROM

Step combine

v

STO

Step jump

v

[step instruction declare]

1. Subroutine. interrupt routine not support step instruction,FBD,IL language not support step instruction.

2. In the step not support jump . loop instruction.

3. If a step is ON, the program within the step be executed, then not executed.

4. Support step branch . step combine process.

5. Jump between the step, the last step state and OUT instruction outputs . timer coil T and current value TV . counter coil C and current value CV within the step will be clear .SET instruction will be not reset.

6. When the step roll-out, Y output want keep ON be use SET instruction drive the output, want clear the output to OFF, use RST instruction.

7. Step number Sn cannot repeat, without step instruction in the program the S relay can be used as general internal relay.

8. If want terminate the step, use RST Sx to reset the step, batch reset use the ZRST instruction.

9. Any S component can be used the start step, start step use STO or SET start, step jump use STO instruction.

10. The program can activate 10 different step process at the same time .

STL (Step start)


Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

Without

Without

Download

[Instruction function and effect declare]

STL instruction represent a step start, if the step have electricity, the program within the step be executed, then not executed.

[Instruction example]

[Program description]:

1. When M2=ON then start step S3,by now S3=ON

2. When S3=ON, moreover jump condition X0=ON, then go to step S20,by now S20=ON. S3=OFF

3. When S20=ON then Y0=ON, when jump condition X1=ON, then go to step S30,by now S30=ON. S20=OFF. Y0=OFF

, when jump condition X4=ON, then go to step S31,by now S31=ON. S20=OFF. Y0=OFF

, when jump condition X7=ON, then go to step S32,by now S32=ON. S20=OFF. Y0=OFF

(step selectivity branch)

4. When S30=ON then Y1=ON, when jump condition X2=ON, then go to step S40,by now S40=ON. S30=OFF. Y1=OFF

5. When S40=ON then Y2=ON, when jump condition X3=ON, then go to step S50,by now S50=ON. S40=OFF. Y2=OFF

6. When S31=ON then Y3=ON, when jump condition X5=ON, then go to step S41,by now S41=ON. S31=OFF. Y3=OFF

7. When S41=ON then Y4=ON, when jump condition X6=ON, then go to step S50,by now S50=ON. S41=OFF. Y4=OFF

8. When S32=ON then Y5=ON, when jump condition X10=ON, then go to step S42,by now S42=ON. S32=OFF. Y5=OFF

9. When S42=ON then Y6=ON, when jump condition X11=ON, then go to step S50,by now S50=ON. S42=OFF. Y6=OFF

10. When S50=ON then Y7=ON, when jump condition X12=ON, then go to step S3,by now S3=ON. S50=OFF. Y7=OFF, circulate repeatedly.

SFROM (Step combine)


Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

Without

Without

Download

[Instruction function and effect declare]

SFROM use for combine after step parallel branch.

[Instruction example]

[Program description ]:

1. When program start the first scanning cycle SM2=ON, start step S3,by now S3=ON

2. When S3=ON, moreover jump condition X0=ON, then go to step S20,by now S20=ON. S3=OFF

3. When S20=ON then Y0=ON, when jump condition X1=ON, then go to step S30 S31 (step parallel branch)at the same time,by now S30=ON. S31=ON. S20=OFF. Y0=OFF

4. When S30=ON then Y1=ON, when jump condition X2=ON, then go to step S40,by now S40=ON. S30=OFF. Y1=OFF

5. When S40=ON then Y2=ON

6. When S31=ON then Y3=ON, when jump condition X3=ON, then go to step S41,by now S41=ON. S31=OFF. Y3=OFF

7. When S41=ON then Y4=ON

8. When S40=ON moreover S41=ON (step parallel branch combine), moreover jump condition X5=ON?, then go to step S60,by now S60=ON. S40=OFF. Y2=OFF. S41=OFF. Y4=OFF

9. When S60=ON then Y7=ON, when jump condition X6=ON, then go to step S3,by now S3=ON. S60=OFF. Y7=OFF, circulate repeatedly.

10. If M2=ON, then batch reset 100 steps start from s0, that is S0~S99.

STO (Step jump)


Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

Without

Without

Download

[Instruction function and effect declare]

STO use for start next step process, or bring the program process go to the specified step number.

[Instruction example]

[Program description]:

1. When M2=ON, start step S3,by now S3=ON

2. When S3=ON, moreover jump condition X0=ON, then go to step S20,by now S20=ON. S3=OFF

3. When S20=ON then Y0=ON,at the same time start timer T0, when T0 time is up, then go to step S30,by now S30=ON. S20=OFF. Y0=OFF. T0=OFF

4. When S30=ON then Y1=ON, when jump condition X1=ON, then go to step S60,by now S60=ON. S30=OFF. Y1=OFF

5. When S60=ON then Y7=ON, when jump condition X2=ON, then go to step S3,by now S3=ON. S60=OFF. Y7=OFF, circulate repeatedly.

, when exit condition X3=ON, then reset step S60,by now S60=OFF. Y7=OFF, terminate the step.

Bit instruction


Bit instruction list as follows

Instruction name 8 bit model 32 bit model Instruction function Support language
LD FBD IL
AND

Logic AND

v

v

OR

Logic OR

v

v

XOR

Logic XOR

v

v

OUT

Coil output

v

v

v

SET

Setting

v

v

v

RST

Reset

v

v

v

ALT

ON/OFF alternately output

v

v

v

ZRST

Batch reset

v

v

v

ENO

Get ENO output

v

AND(Logic AND)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

Without

AND In1, In2 [, ?/span>, In15], Out

Download

Parameter Parameter define Input Output Declare

In1

Operand 1

v

In2

Operand 2

v

?o:p>

?/span>

?o:p>

In15

Operand 15

v

Out

Status output

v

[Instruction function and effect declare]

AND instruction logic AND a group bit component of Input and then output, only In1~In15 Input states all are ON the Out=ON, otherwise Out=OFF,support 2~15 variable Input.

OR(Logic OR)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

Without

OR In1, In2 [, ?/span>, In15], Out

Download

Parameter Parameter define Input Output Declare

In1

Operand 1

v

In2

Operand 2

v

?o:p>

?/span>

?o:p>

In15

Operand 15

v

Out

Status output

v

[Instruction function and effect declare]

OR instruction logic OR a group bit component of Input and then output, if only one of In1~In15 Input states is ON the Out=ON, otherwise Out=OFF,support 2~15 variable Input.

XOR(Logic XOR)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

Without

XOR In1, In2 [, ?/span>, In15], Out

Download

Parameter Parameter define Input Output Declare

In1

Operand 1

v

In2

Operand 2

v

?o:p>

?/span>

?o:p>

In15

Operand 15

v

Out

Status output

v

[Instruction function and effect declare]

XOR instruction logic XOR a group bit component of Input and then output, when the ON odd number of In1~In15 Input states the Out=ON, otherwise Out=OFF,support 2~15 variable Input.

OUT(Coil output)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

OUT In, Out

Download

Parameter Parameter define Input Output Declare
In

Input

v

Out

Output

v

[Instruction function and effect declare]

OUT instruction assign Input state to Output,In=ON then Out=ON,In=OFF then Out=OFF.

SET(Setting)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

SET In, Out

Download

Parameter Parameter define Input Output Declare
In

Input

v

Out

Output

v

[Instruction function and effect declare]

SET instruction according Input state to set output,In=ON then Out=ON,In=OFF then Out keep the original state.SET instruction general used edge Input executed.

RST(Reset)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

RST In, Out

Download

Parameter Parameter define Input Output Declare
In

Input

v

Out

Output

v

[Instruction function and effect declare]

1. RST instruction according Input state to reset Output, In=ON then Out=OFF,In=OFF then Out keep the original state.RST instruction general used edge Input executed.

2. If Out is timer Tx,at the same time reset the timer coil T and current value TV, if Output is counter Cx,at the same time reset the counter coil C and current value CV.

3. If Out is step relay S,except reset the step state, if the step is executing then reset the output of the OUT instruction . timer coil T and current value TV . counter coil C and current value CV within the step .

ALT(ON/OFF alternately output)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

ALT In, Out

Download

Parameter Parameter define Input Output Declare
In

Input

v

Out

Output

v

[Instruction function and effect declare]

ALT instruction negation the input state to output state, In=ON then Out negation it self,In=OFF then Out keep the original state.ALT instruction general used edge Input executed.

ZRST(Batch reset)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

ZRST En, N, Des

Download

Parameter Parameter define Input Output Declare
En

Enable Input

v

N

Component numbers to be reset

v

1~256

Eno

Enable output

v
Des

Start address of component to be reset

v

[Instruction function and effect declare]

1. ZRST instruction batch reset N component start from Des.ZRST instruction general used edge Input executed.

2. If Des is timer Tx, will reset timer coil T and current value TV,Iif Output is counter Cx, will reset counter coil C and current value CV.

3. if Des is step state S,except reset the step state, if the step is executing then reset the output of the OUT instruction . timer coil T and current value TV . counter coil C and current value CV within the step.

ENO(Get ENO output)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

Without

Without

EnO Out

Download

Parameter Parameter define Input Output Declare
Out

Output

v

[Instruction function and effect declare]

1. IL Language All instruction without Eno Enable outpu item in IL Language, for programmed by IL Language and FBD Language . LD Language the same function, in IL language special add ENO instruction, it's function equal to the Eno Enable output items of the application instruction in FBD. LD Language.

2. ENO instruction only one Output item,the state of Output items only relate to the first item near the ENO instruction in BD or LD language have Eno Output instruction.

[Instruction example]

[Program description]

1. MAX instruction is a FBD or LD language instructionwhich have Eno Output item, moreover nearest ENO instruction(because OUT instruction have not Eno Output item), so in program, the output item state M0 of ENO instruction relate to MAX instruction executive condition.

2. When X0=ON (X2 normal close),M100=ON

3. M100=ON, MAX instruction execute, V10 equal to V1000. V1001. V1002 the 3 registers maximum,Eno Output=ON of the MAX instruction

4. X2=OFF,Y0=OFF

5. ENO instruction get Eno Output of previous instruction,because MAX instruction Eno Output=ON,so the M0 state is ON

6. M0=ON,ADD instruction??,AQ0=V10+200

Timer


Timer list as follows

Instruction name 8 bit model 32 bit model Instruction function Support language
LD FBD IL
TON

Delay ON

v

v

v

TOF

Delay OFF

v

v

v

TP

Pulse timer

v

v

v

Note:T252~T255 time base fixed to 1ms.Others timer time base can be set arbitrarily to 10ms. 100ms. 1s.

TON(Delay ON)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

TON.ns In, Pt, Tx

Download

Parameter Parameter define Input Output Declare
ns

Base time value

T252~T255 time base are 1ms.Others can be set arbitrarily to 10ms. 100ms. 1s

In

Input

v

Pt

Set time

v

Out Timer coil Tx

v
TV

Current time

v

[Instruction function and effect declare]

1. TON is delay ON instruction, when In=ON, start timer timing,TV is the current value of the timer, when TV equal to the set time (time time to),Out(timer output coil Tx)=ON,and stop timing.When In turn into OFF,Out(timer output coil Tx)=OFF, moreover TV value reset to zero.In the timing process(time non-arrival),In turn into OFF, then stop timing,Out(timer output coil Tx)=OFF, moreover TV value reset to zero.

2. Timing time= time base(ns)? setting time(Pt).E.g,:time base is 1s,setting time Pt=10, then delay on time is 1s ? 10 = 10s.

[Instruction example]

[Program sketch map]

[Program description]

Timing time= time base(1s)? setting time (Pt=10)=10s.When X0=ON, timer T0 start timing, when TV0=10,T0=ON(Y0=ON) moreover stop timing .If X0=OFF,then T0=OFF(Y0=OFF),TV=0.

TOF(Delay OFF)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

TOF.ns In, Pt, Tx

Download

Parameter Parameter define Input Output Declare
ns

Time base

T252~T255 time base is 1ms.Others can be set arbitrarily to 10ms. 100ms. 1s

In

Input

v

Pt

Setting time

v

Out Timer coil Tx

v
TV

Current time

v

[Instruction function and effect declare]

1. TOF is delay OFF instruction, when In=ON,Out(Timer coil Tx)=ON, When In state from ON go to OFF, start timer timing,TV is the timer current value, when TV equal to setting time (time time to),Out(Timer coil Tx)=OFF, and stop timing,TV=0.In the timing process(time non-arrival),the state of In go to ON, then Out (Timer coil Tx)=ON, timer stop timing,TV=0.

2. Timing time=time base(ns)? setting time(Pt).e.g.:time base is 10ms,Setting time Pt=1000, then delay OFF time is 10ms ? 1000 = 10s.

[Instruction example]

[Program sketch map]

[Program description]

Timing time=time base (10ms)? setting time(Pt=1000)=10s.When X0=ON,T0=ON(Y0=ON), when X0=OFF, Timer T0 start timing, when TV0=1000,T0=OFF(Y0=OFF) moreover stop timing TV=0.if time non-arrival X0=ON, then T0=ON(Y0=ON), stop timing TV=0.

TP(Pulse timer)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

TP.ns In, Pt, Tx

Download

Parameter Parameter define Input Output Declare
ns

Time base

T252~T255 time base is 1ms.Others can be set arbitrarily to 10ms. 100ms. 1s

In

Input

v

Pt

Setting time

v

Out Timer coil Tx

v
TV

Current time

v

[Instruction function and effect declare]

1. TP is pulse timer, when In=ON,Out(Timer coil Tx)=ON, start timer timing,TV is timer current value, when TV equal to setting time (time arrival),Out(Timer coil Tx)=OFF,stop timing moreover TV value reset to zero.In the timing process(time non-arrival),regardless of the state of In changed, timer keep timing,Out(Timer coil Tx) keep ON.

2. Timing time= time base(ns)? setting time(Pt).e.g.:time base is 100ms,setting timePt=100, then the delay ON time is 100ms ? 100 = 10s.

[Instruction example]

[Program sketch map]

[Program description]

Timing time= time base(100ms)? setting time(Pt=100)=10s.When X0=ON,T0=ON(Y0=ON),timer T0 start timing, when TV0=100,T0=OFF(Y0=OFF) moreover stop timing TV0=0.In the timing process,regardless of the state of X0 changed,timer keep timing,T0 keep ON until timing terminate.

Counter


Counter list as follows

Instruction name 8 bit model 32 bit model Instruction function Support language
LD FBD IL
CTU

D.CTU

Increase counter

v

v

v

CTD

D.CTD

Decrease counter

v

v

v

CTUD

D.CTUD

Increase and Decrease counter

v

v

v

Note:C48~C79 are 32 bit counter, others are 16 bit counter.

CTU. D.CTU(Increase counter)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

CTU Cu, PV, Cx

D.CTU Cu, PV, Cx

Download

Parameter Parameter define Input Output Declare
Cu

Increase count input

v

PV

Counter preset

v

Out Counter coil Cx

v Among C48~C79 are 32 bit counter, total 32 point
CV

Counter current value

v

[Instruction function and effect declare]

CTU is 16 bit increase counter instruction (D.CTU is 32 bit), when increase count input Cu from OFF go to ON, counter add 1, when CV great than or equal to PV, Out (counter coil Cx)=ON. Counting reached,if the counting pulse input again, counting will be continue, CV value will be added 1 continue, until reach maximum value(16 bit counter maximum value is 32767,32 bit counter maximum value is 2147483647),counting will not be continue after reach maximum value.

[Instruction example]

[Program description]

When X0 from OFF go to ON once,CV0 add 1, when CV0 ? 10 counting reach,C0=ON(Y0=ON).

CTD. D.CTD(Decrease counter)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

CTD Cd, PV, Cx

D.CTD Cd, PV, Cx

Download

Parameter Parameter define Input Output Declare
Cd

Decrease count input

v

PV

Counter preset

v

Out Counter coil Cx

v Among C48~C79 are 32 bit counter, total 32 point
CV

Counter current value

v

[Instruction function and effect declare]

1. CTD is 16 bit increase counter instruction (D.CTU is 32 bit), When decrease count input Cu from OFF go to ON, counter subtract 1, when CV=0 then counting reached, Out (counter coil Cx)=ON.Counting reached, if the counting pulse input again, counting will not be continue.

2. When CTD instruction loaded or reset, CV = PV, that is CTD decrease from preset to 0.

[Instruction example]

[Program description]

When program running CV=10, when X0 from OFF go to ON once,CV0 decrease 1, when CV0 = 0 counting reach,C0=ON(Y0=ON).

CTUD. D.CTUD(Increase and Decrease counter)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

CTUD Cu, Cd, PV, Cx

D.CTUD Cu, Cd, PV, Cx

Download

Parameter Parameter define Input Output Declare
Cu

Increase count Input

v

Cd

Decrease input Input

v

PV

Counter preset

v

Out Counter coil Cx

v Among C48~C79 are 32 bit counter, total 32 point
CV

Counter current value

v

[Instruction function and effect declare]

1. CTUD is 16 bit increase and decrease counter instruction (D.CTUD is 32 bit), when increase count input Cu from OFF go to ON,counter add 1, when decrease count Input Cd from OFF go to ON,counter subtract 1, when CV great than or equal to PV, Out (counter coil Cx)=ON, When CV less than PV, Out (counter coil Cx)=OFF.

2. 16 bit counter maximum CV value is 32767,minimum CV value is -32768,32 bit counter maximum CV value is 2147483647,minimum CV value is -2147483648.

[Instruction example]

[Program description]

When X0 from OFF go to ON once,CV0 add 1, when X1 from OFF go to ON once,CV0 subtract 1, when CV0 ? 10,C0=ON(Y0=ON), When CV0 <10,C0=OFF(Y0=OFF).

High speed control instruction


High speed control instruction list as follows

Instruction name 8 bit model 32 bit model Instruction function Support language
LD FBD IL
SHC

?

?

Single high speed counter

v

v

v

RESH

?

?

IO refresh

v

v

v

HHSC

?

?

High speed counter

v

v

v

HCWR

?

?

Write high speed counter

v

v

v

SPD

?

?

Speed detection

v

v

v

PWM

?

?

Pulse width modulation

v

v

v

PLSY

?

D.PLSY

Pulse output

v

v

v

PLSR

?

D.PLSR

Accelerate and decelerate pulse output

v

v

v

ZRN

?

?

Origin point return

v

v

v

SETZ

?

?

Set electric origin point

v

v

v

PPMR

?

?

Linear interpolation

v

v

v

CIMR

?

?

Circular interpolation

v

v

v

SPLS

?

?

Single pulse output

v

v

v

MPTO

?

?

Multi-segment pulse output

v

v

v

SYNP

?

?

Synchronization pulse output

v

v

v

PSTOP

?

?

Stop pulse output

v

v

v

DVIT

?

?

Synchronization pulse output

v

v

v

ECAM

?

?

Stop pulse output

v

v

v

JOGP

?

?

Jog pulse output

v

v

v

[High speed control instruction declare]

1. Haiwell PLC high speed counter and high speed pulse output defined by channel ,related the hardware of the PLC ,Configured by " PLC hardware configure". High speed counter channel signify by HSCx ,each channel use 2 high speed pulse input point .High speed pulse output channel signify by PLSx , each channel use 2 high speed pulse output point .

2. High speed counter support :pulse/direction . positive/negative pulse . A/B phase pulse input model, support 1. 2. 4 frequency multiplication counting model , refer to" HSC high speed counter parameter".

3. High speed pulse output support : single pulse. pulse/direction . positive/negative pulse . A/B phase pulse . synchronization pulse output,refer to"PLS high speed pulse output parameter".

4. Motion control support linear interpolation . circular interpolation . synchronization pulse output etc.; support absolute address . relative address ; support backlash compensation ;support electric origin point redefine etc..

5. SM system state bit of high speed counter as follows:

SM

Function declare

R/W

Preserve

Default

SM25

HSC0 study enable control,0 is normal state,1 is study state

R/W

No

0

SM26

HSC0 study confirm control

R/W

No

0

SM27

HSC0 reset control 0 is automatic reset 1 is not reset

R/W

No

0

SM30

HSC0 direction indication,0 is increase,1 is decrease

R

No

0

SM31

HSC0 error indication

R

No

0

SM33

HSC1 study enable control,0 is normal state,1 is study state

R/W

No

0

SM34

HSC1 study confirm control

R/W

No

0

SM35

HSC1 reset control 0 is automatic reset 1 is not reset

R/W

No

0

SM38

HSC1 direction indication,0 is increase,1 is decrease

R

No

0

SM39

HSC1 error indication

R

No

0

SM41

HSC2 study enable control,0 is normal state,1 is study state

R/W

No

0

SM42

HSC2 study confirm control

R/W

No

0

SM43

HSC2 reset control 0 is automatic reset 1 is not reset

R/W

No

0

SM46

HSC2 direction indication,0 is increase,1 is decrease

R

No

0

SM47

HSC2 error indication

R

No

0

SM49

HSC3 study enable control,0 is normal state,1 is study state

R/W

No

0

SM50

HSC3 study confirm control

R/W

No

0

SM51

HSC3 reset control 0 is automatic reset 1 is not reset

R/W

No

0

SM54

HSC3 direction indication,0 is increase,1 is decrease

R

No

0

SM55

HSC3 error indication

R

No

0

SM57

HSC4 study enable control,0 is normal state,1 is study state

R/W

No

0

SM58

HSC4 study confirm control

R/W

No

0

SM59

HSC4 reset control 0 is automatic reset 1 is not reset

R/W

No

0

SM62

HSC4 direction indication,0 is increase,1 is decrease

R

No

0

SM63

HSC4 error indication

R

No

0

SM65

HSC5 study enable control,0 is normal state,1 is study state

R/W

No

0

SM66

HSC5 study confirm control

R/W

No

0

SM67

HSC5 reset control 0 is automatic reset 1 is not reset

R/W

No

0

SM70

HSC5 direction indication,0 is increase,1 is decrease

R

No

0

SM71

HSC5 error indication

R

No

0

SM73

HSC6 study enable control,0 is normal state,1 is study state

R/W

No

0

SM74

HSC6 study confirm control

R/W

No

0

SM75

HSC6 reset control 0 is automatic reset 1 is not reset

R/W

No

0

SM78

HSC6 direction indication,0 is increase,1 is decrease

R

No

0

SM79

HSC6 error indication

R

No

0

SM81

HSC7 study enable control,0 is normal state,1 is study state

R/W

No

0

SM82

HSC7 study confirm control

R/W

No

0

SM83

HSC7 reset control 0 is automatic reset 1 is not reset

R/W

No

0

SM86

HSC7 direction indication,0 is increase,1 is decrease

R

No

0

SM87

HSC7 error indication

R

No

0

6. SV system register of high speed counter as follows :

SV

Function declare

R/W

Preserve

Default

SV60

HSC0 current segment number

R

Yes

0

SV61

HSC0 low word of current value

R

Yes

0

SV62

HSC0 high word of current value

R

Yes

0

SV63

HSC0 error code

R

Yes

0

SV801

HSC0 low word of frequency

R

Yes

0

SV802

HSC0 high word of frequency

R

Yes

0

SV64

HSC1 current segment number

R

Yes

0

SV65

HSC1 low word of current value

R

Yes

0

SV66

HSC1 high word of current value

R

Yes

0

SV67

HSC1 error code

R

Yes

0

SV803

HSC1 low word of frequency

R

Yes

0

SV804

HSC1 high word of frequency

R

Yes

0

SV68

HSC2 current segment number

R

Yes

0

SV69

HSC2 low word of current value

R

Yes

0

SV70

HSC2 high word of current value

R

Yes

0

SV71

HSC2 error code

R

Yes

0

SV805

HSC2 low word of frequency

R

Yes

0

SV806

HSC2 high word of frequency

R

Yes

0

SV72

HSC3 current segment number

R

Yes

0

SV73

HSC3 low word of current value

R

Yes

0

SV74

HSC3 high word of current value

R

Yes

0

SV75

HSC3 error code

R

Yes

0

SV807

HSC3 low word of frequency

R

Yes

0

SV808

HSC3 high word of frequency

R

Yes

0

SV76

HSC4 current segment number

R

Yes

0

SV77

HSC4 low word of current value

R

Yes

0

SV78

HSC4 high word of current value

R

Yes

0

SV79

HSC4 error code

R

Yes

0

SV809

HSC4 low word of frequency

R

Yes

0

SV810

HSC4 high word of frequency

R

Yes

0

SV80

HSC5 current segment number

R

Yes

0

SV81

HSC5 low word of current value

R

Yes

0

SV82

HSC5 high word of current value

R

Yes

0

SV83

HSC5 error code

R

Yes

0

SV811

HSC5 low word of frequency

R

Yes

0

SV812

HSC5 high word of frequency

R

Yes

0

SV84

HSC6 current segment number

R

Yes

0

SV85

HSC6 low word of current value

R

Yes

0

SV86

HSC6 high word of current value

R

Yes

0

SV87

HSC6 error code

R

Yes

0

SV813

HSC6 low word of frequency

R

Yes

0

SV814

HSC6 high word of frequency

R

Yes

0

SV88

HSC7 current segment number

R

Yes

0

SV89

HSC7 low word of current value

R

Yes

0

SV90

HSC7 high word of current value

R

Yes

0

SV91

HSC7 error code

R

Yes

0

SV815

HSC7 low word of frequency

R

Yes

0

SV816

HSC7 high word of frequency

R

Yes

0

7. SM system state bit of High speed pulse output as follows:

SM

Function declare

R/W

Preserve

Default

SM93

PLS0 prohibit the forward pulse

R/W

yes

0

SM94

PLS0 prohibit the reverse pulse

R/W

yes

0

SM95

PLS0 prohibit the brake function

R/W

yes

0

SM96

PLS0 pulse output indication

R

yes

0

SM97

PLS0 pulse output direction indication ,0 is forward ,1 is reverse

R

yes

0

SM98

PLS0 error flag

R

yes

0

SM99

PLS0 position model ,0 is relative address ,1 is absolute address

R/W

yes

0

SM100

PLS0 pulse output complete

R

yes

0

SM109

PLS1 prohibit the forward pulse

R/W

yes

0

SM110

PLS1 prohibit the reverse pulse

R/W

yes

0

SM111

PLS1 prohibit the brake function

R/W

yes

0

SM112

PLS1 pulse output indication

R

yes

0

SM113

PLS1 pulse output direction indication ,0 is forward ,1 is reverse

R

yes

0

SM114

PLS1 error flag

R

yes

0

SM115

PLS1 position model ,0 is relative address ,1 is absolute address

R/W

yes

0

SM116

PLS1 pulse output complete

R

yes

0

SM125

PLS2 prohibit the forward pulse

R/W

yes

0

SM126

PLS2 prohibit the reverse pulse

R/W

yes

0

SM127

PLS2 prohibit the brake function

R/W

yes

0

SM128

PLS2 pulse output indication

R

yes

0

SM129

PLS2 pulse output direction indication ,0 is forward ,1 is reverse

R

yes

0

SM130

PLS2 error flag

R

yes

0

SM131

PLS2 position model ,0 is relative address ,1 is absolute address

R/W

yes

0

SM132

PLS2 pulse output complete

R

yes

0

SM141

PLS3 prohibit the forward pulse

R/W

yes

0

SM142

PLS3 prohibit the reverse pulse

R/W

yes

0

SM143

PLS3 prohibit the brake function

R/W

yes

0

SM144

PLS3 pulse output indication

R

yes

0

SM145

PLS3 pulse output direction indication ,0 is forward ,1 is reverse

R

yes

0

SM146

PLS3 error flag

R

yes

0

SM147

PLS3 position model ,0 is relative address ,1 is absolute address

R/W

yes

0

SM148

PLS3 pulse output complete

R

yes

0

SM157

PLS4 prohibit the forward pulse

R/W

yes

0

SM158

PLS4 prohibit the reverse pulse

R/W

yes

0

SM159

PLS4 prohibit the brake function

R/W

yes

0

SM160

PLS4 pulse output indication

R

yes

0

SM161

PLS4 pulse output direction indication ,0 is forward ,1 is reverse

R

yes

0

SM162

PLS4 error flag

R

yes

0

SM163

PLS4 position model ,0 is relative address ,1 is absolute address

R/W

yes

0

SM164

PLS4 pulse output complete

R

yes

0

SM173

PLS5 prohibit the forward pulse

R/W

yes

0

SM174

PLS5 prohibit the reverse pulse

R/W

yes

0

SM175

PLS5 prohibit the brake function

R/W

yes

0

SM176

PLS5 pulse output indication

R

yes

0

SM177

PLS5 pulse output direction indication ,0 is forward ,1 is reverse

R

yes

0

SM178

PLS5 error flag

R

yes

0

SM179

PLS5 position model ,0 is relative address ,1 is absolute address

R/W

yes

0

SM180

PLS5 pulse output complete

R

yes

0

SM189

PLS6 prohibit the forward pulse

R/W

yes

0

SM190

PLS6 prohibit the reverse pulse

R/W

yes

0

SM191

PLS6 prohibit the brake function

R/W

yes

0

SM192

PLS6 pulse output indication

R

yes

0

SM193

PLS6 pulse output direction indication ,0 is forward ,1 is reverse

R

yes

0

SM194

PLS6 error flag

R

yes

0

SM195

PLS6 position model ,0 is relative address ,1 is absolute address

R/W

yes

0

SM196

PLS6 pulse output complete

R

yes

0

SM205

PLS7 prohibit the forward pulse

R/W

yes

0

SM206

PLS7 prohibit the reverse pulse

R/W

yes

0

SM207

PLS7 prohibit the brake function

R/W

yes

0

SM208

PLS7 pulse output indication

R

yes

0

SM209

PLS7 pulse output direction indication ,0 is forward ,1 is reverse

R

yes

0

SM210

PLS7 error flag

R

yes

0

SM211

PLS7 position model ,0 is relative address ,1 is absolute address

R/W

yes

0

SM212

PLS7 pulse output complete

R

yes

0

8. SV system register of high speed pulse output as follows:

SV

Function declare

R/W

Preserve

Default

SV92

PLS0 current segment number

R

Yes

0

SV93

PLS0 low word of pulse output number

R

Yes

0

SV94

PLS0 high word of pulse output number

R

Yes

0

SV95

PLS0 low word of current position

R

Yes

0

SV96

PLS0 high word of current position

R

Yes

0

SV97

PLS0 error code

R

Yes

0

SV156

PLS0 low word of mechanical original point

R

Yes

0

SV157

PLS0 high word of mechanical original point

R

Yes

0

SV158

PLS0 number of pulses to compensate the reverse interval

R/W

Yes

0

SV159

PLS0 follow performance parameters, range: 1~100

R/W

yes

50

SV98

PLS1 current segment number

R

Yes

0

SV99

PLS1 low word of pulse output number

R

Yes

0

SV100

PLS1 high word of pulse output number

R

Yes

0

SV101

PLS1 low word of current position

R

Yes

0

SV102

PLS1 high word of current position

R

Yes

0

SV103

PLS1 error code

R

Yes

0

SV160

PLS1 low word of mechanical original point

R

Yes

0

SV161

PLS1 high word of mechanical original point

R

Yes

0

SV162

PLS1 number of pulses to compensate the reverse interval

R/W

Yes

0

SV163

PLS1 follow performance parameters, range: 1~100

R/W

yes

50

SV104

PLS2 current segment number

R

Yes

0

SV105

PLS2 low word of pulse output number

R

Yes

0

SV106

PLS2 high word of pulse output number

R

Yes

0

SV107

PLS2 low word of current position

R

Yes

0

SV108

PLS2 high word of current position

R

Yes

0

SV109

PLS2 error code

R

Yes

0

SV164

PLS2 low word of mechanical original point

R

Yes

0

SV165

PLS2 high word of mechanical original point

R

Yes

0

SV166

PLS2 number of pulses to compensate the reverse interval

R/W

Yes

0

SV167

PLS2 follow performance parameters, range: 1~100

R/W

yes

50

SV110

PLS3 current segment number

R

Yes

0

SV111

PLS3 low word of pulse output number

R

Yes

0

SV112

PLS3 high word of pulse output number

R

Yes

0

SV113

PLS3 low word of current position

R

Yes

0

SV114

PLS3 high word of current position

R

Yes

0

SV115

PLS3 error code

R

Yes

0

SV168

PLS3 low word of mechanical original point

R

Yes

0

SV169

PLS3 high word of mechanical original point

R

Yes

0

SV170

PLS3 number of pulses to compensate the reverse interval

R/W

Yes

0

SV171

PLS3 follow performance parameters, range: 1~100

R/W

yes

50

SV116

PLS4 current segment number

R

Yes

0

SV117

PLS4 low word of pulse output number

R

Yes

0

SV118

PLS4 high word of pulse output number

R

Yes

0

SV119

PLS4 low word of current position

R

Yes

0

SV120

PLS4 high word of current position

R

Yes

0

SV121

PLS4 error code

R

Yes

0

SV172

PLS4 low word of mechanical original point

R

Yes

0

SV173

PLS4 high word of mechanical original point

R

Yes

0

SV174

PLS4 number of pulses to compensate the reverse interval

R/W

Yes

0

SV175

PLS4 follow performance parameters, range: 1~100

R/W

yes

50

SV122

PLS5 current segment number

R

Yes

0

SV123

PLS5 low word of pulse output number

R

Yes

0

SV124

PLS5 high word of pulse output number

R

Yes

0

SV125

PLS5 low word of current position

R

Yes

0

SV126

PLS5 high word of current position

R

Yes

0

SV127

PLS5 error code

R

Yes

0

SV176

PLS5 low word of mechanical original point

R

Yes

0

SV177

PLS5 high word of mechanical original point

R

Yes

0

SV178

PLS5 number of pulses to compensate the reverse interval

R/W

Yes

0

SV179

PLS5 follow performance parameters, range: 1~100

R/W

yes

50

SV128

PLS6 current segment number

R

Yes

0

SV129

PLS6 low word of pulse output number

R

Yes

0

SV130

PLS6 high word of pulse output number

R

Yes

0

SV131

PLS6 low word of current position

R

Yes

0

SV132

PLS6 high word of current position

R

Yes

0

SV133

PLS6 error code

R

Yes

0

SV180

PLS6 low word of mechanical original point

R

Yes

0

SV181

PLS6 high word of mechanical original point

R

Yes

0

SV182

PLS6 number of pulses to compensate the reverse interval

R/W

Yes

0

SV183

PLS6 follow performance parameters, range: 1~100

R/W

yes

50

SV134

PLS7 current segment number

R

Yes

0

SV135

PLS7 low word of pulse output number

R

Yes

0

SV136

PLS7 high word of pulse output number

R

Yes

0

SV137

PLS7 low word of current position

R

Yes

0

SV138

PLS7 high word of current position

R

Yes

0

SV139

PLS7 error code

R

Yes

0

SV184

PLS7 low word of mechanical original point

R

Yes

0

SV185

PLS7 high word of mechanical original point

R

Yes

0

SV186

PLS7 number of pulses to compensate the reverse interval

R/W

Yes

0

SV187

PLS7 follow performance parameters, range: 1~100

R/W

yes

50

SHC (Single high counter)


Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

SHC En, PV, Dir, Reset, X, Out, HVal

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?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
PV

Preset value

v

? Occupy 2 continuous component
Dir

Counter direction

v

?
Reset

Reset

v

? ?
X

Pulse input

v

? ?
Out

Comparison results

? v ?
HVal

High speed counter current value

?

v Occupy 2 continuous component

[Instruction function and effect declare]

1. SHC instruction counts the high-speed impulse input of the Xn input point , it does not use the HSCx high-speed pulse input channel, one high-speed pulse input channel has two high-speed pulse input points. Therefore the host with eight pulse input channels can achieve the fucntion of 16 ways high-speed pulse input.

2. SHC instruction is a 32-bit high-speed pulse counter, it does not generate high-speed counter interrupt, and it doesn't use the SM, SV.

3. Dir terminal control the counting direction, when Dir = OFF it adds counting;while when Dir = ON,it reduces counting.

4. Reset terminal controls the reset of the counter,when Reset = ON , it resets the counter.

5. When "HVal" is greater than or equal to "PV" , "Out" is equal to "ON", when "HVal" is less than "PV", then "Out" is equal to "OFF".

[Instruction example]

[Program description]

1. When M0=ON , HSC high-speed counter works, it begings counting the high-speed pulse input of the X0 input.

2. When M8=OFF, it adds counting, when M8=ON,it reduces counting.

3. When V50>=V1000, M100=ON, while when V50<V1000, M100=OFF .

4. When M9=ON, it resets the counter, M100=OFF, V50=0.

RESH(IO refresh)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

RESH En, IO, N

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?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
IO

IO start address be refreshed

v

?

Occupy N continuous component

N

Number of component be refreshed

v ? 1~256
Eno

Enable output

? v ?

[Instruction function and effect declare]

1. RESH instruction use for refresh the state of external digital Input . Output (X. Y), in order to improve the response speed of the external signal.

2. En is the enable item of the instruction , when the state of En ON, the N continuous component (X. Y) of IO assigned will be updated immediately , without having to wait until the program scan complete

,the IO state update independence to the program scan cycle.

Note: the instruction used for real-time or high accuracy control circumstance ,as high speed control . interrupt processing etc. .Without RESH instruction in the program ,PLC external Input . Output state will be updated after the total program scaned finish.

[Instruction example]

[Program description]

When X0=ON,Y0~Y7 Output state updated immediately , without having to wait until the program scan complete.

HHSC(High speed counter )

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

HHSC En, PV, N, Mod, HSCx, Out

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?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
PV

Start address of preset value

v

?

Each segmentOccupy 2 register

N

Number of compare segments

v

1-48

Mod

Compare model

v

?

0-2:0 is single segment compare , 1 is absoulte compare , 2 is relatively compare

HSCx

High speed counter number

v

? ?
Out

Start address of compare result

?

v

Each segmentOccupy 1 component

HVal

High speed counter current value

v

Occupy 2 System register

HFre

High speed counter current frequency value

?

v

Occupy 2 System register

[Instruction function and effect declare]

1. HHSC instruction is deal with the high speed pulse input , it can deal with input pulse counting and measure the pulse frequency at the same time.

2. High speed counter support :pulse/direction . positive/negative pulse . A/B phase pulse input model, support 1. 2. 4 frequency multiplication counting model , refer to"HSC high speed counter parameter"

3. HHSC instruction relate to SM system state bit . SV System register , when count value=preset value generate " HSCx current value=preset value ( the preset value of each segment will be generated) " interrupt , when the direction of input pulse changed will be generate "HSCx input direction changed " interrupt .

4. Support multi-segment compare ,support 3 type compare model :single segment compare . absolute model compare . relatively model compare .

5. HHSC instruction have self-learning function ,in the self-learning can record the current value to the preset value , can continuous multi-segment self-learning .The high speed counter HSCx will be reset while enter into or quit the self-learning state .

6. Reset high speed counter . modify the preset value real time . modify the current value . modify the current segment number ,use HCWR instruction.

7. When En=ON,HHSC instruction executing, when En=OFF ,stop counting.

[High speed counter model and pulse waveform]

Count model

Pulse waveform

Model

Times frequency

Increase count

Decrease count

0 --pulse/direction 1

1 --pulse/direction 2

2 --foreward/reversal 1

3 --foreward/reversal 2

4 -- A/B phase 1

5 -- A/B phase 2

6 -- A/B phase 4

[Instruction example 1]

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[Program 1 declare]

PV component

Value

Declare

V1000V1001

200

First segment preset

V1002V1003

500

Second segment preset

V1004V1005

1200

Third segment preset

V1006V1007

1500

Fourth segment preset

1. When M0=ON ,HHSC instruction executing ,high speed counter HSC0 set to single segment compare model ,number of compare segments are 4.Initial segment number is 1,HSC0 first segment preset value=200(V1000V1001) for compare.

2. When M1=ON ,instead HSC0 current segment number to 2,then HSC0 second segment preset value =500(V1002V1003) for compare .

3. When M2=ON ,instead HSC0 preset of current segment to 1000,that is second segment preset value=1000(V1002V1003).

4. When M3=ON ,reset HSC0 ,HSC0 current value =0,HSC0 current segment number=1

?

[Instruction example 2]

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[Program 2 schematic diagram]

PV component

Value

Declare

V1000V1001

200

First segment preset

V1002V1003

500

Second segment preset

V1004V1005

1000

Third segment preset

V1006V1007

1500

Fourth segment preset

[program 2 declare]

1. When M0=ON ,HHSC instruction executing , high speed counter HSC0 set as absolute compare model,number of compare segments are 4.

2. When M3=ON ,reset HSC0 ,HSC0 current value =0,HSC0 current segment number=1

?

[Instruction example 3]

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[Program 3 schematic diagram]

PV component

Value

Declare

V1000V1001

300

First segment preset

V1002V1003

200

Second segment preset

V1004V1005

450

Third segment preset

V1006V1007

150

Fourth segment preset

[Program 3 declare]

1. When M0=ON,HHSC instruction executing ,high speed counter HSC0 set as relatively compare model ,number of compare segments are 4.

2. When M3=ON ,reset HSC0 ,HSC0 current value=0,HSC0 current segment number=1

?

[Instruction example 4]

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[Program 4 declare]

1. When M0=ON ,HHSC instruction executing, high speed counter HSC0 set as single segment compare Model ,number of compare segments 4.The initial segment of number 1.

2. When M1=ON ,SM25=ON,HSC0 enter into study state, reset HSC0 at the same time.

3. When M2=ON,SM26=ON,HSC0 learn confirm that is write HSC0 current value to current segment preset value, segment number add 1 automatic go to next segment ,if segment number great than number of segments (this example N=4) then segment number =1.each SM26=ON once record one segment preset value .

4. At study finish ,reset M1=OFF,SM25=OFF,HSC0 quit study state , reset HSC0 at the same time.

HCWR (Write high speed counter)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

HCWR En, Val, Kind, HSCx

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?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Val

Value be wrote

v

? ?
Kind

Value type be wrote

v ?

0-3:0-write current segment,1-write current preset value,2-write high speed counter current value,3- reset high speed counter

HSCx

High speed counter number

v ? ?
Eno

Enable output

?

v ?

[Instruction function and effect declare]

1. HCWR instruction use for high speed counter assist control ,use cooperate HHSC instruction ,accomplish reset high speed counter . modify the preset value real time . modify high speed counter current value . modify current segment number.

2. If segment number be wrote exceed HSCx number of segment setting (HHSC instruction item N define) range ,HSCx report no.1 parameter error .

3. HCWR must be executed by edge .

[Instruction example]

[Program description]

When M3=ON, reset high speed counter HSC0,HSC0 current value =0,current segment number =1.

SPD (Speed detection)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

SPD En, TnP, X, HFre

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?

Parameter Parameter define Input Output Declare
En

Enable

v

?
TnP

Detection time or number of pulse

v

?

TnP>0 is detection time (unit 0.1ms),TnP<0 is detection number of pulse

X

pulse input

v

? ?
Eno

Enable output

?

v ?
HFre

Frequency value

?

v Occupy 2 continuous component

[Instruction function and effect declare]

1. SPD instruction detection the pulse frequency of the high speed input point XnInput of MPU .It nonuse HSCx high speed pulse input channel ,1 high speed pulse input channel have 2 high speed pulse input point .That is the MPU with 8 channels high speed pulse can realize detection 16 channels high speed input pulse .

2. SPD instruction support use time or number of pulse model to detection frequency , when TnP>0 then use time model to detection frequency (unit 0.1ms), when TnP<0 then use number of pulse model to detection frequency .TnP=0 then HFre=0.

3. For detection frequency ensure , when input pulse frequency great than 19KHz please use time model to detection (Suggestion detection time great than 500ms,TnP>5000) , when input pulse frequency less than 19KHz please use number of pulse to detection frequency .

[Instruction example]

[Program description]

1. When M0=ON ,detect X0 pulse input frequency value ,detection time 5000*0.1ms=500ms, that is 500ms refresh once .

2. When M1=ON ,detect X7 pulse input frequency value, number of detection pulses are 600, that is 600 pulses detected refresh once .

PWM (Pulse width modulation)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

PWM En, PulR, PulF, Out

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?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
PulR

Pulse duty factor

v

Unit 0.1%,range 0~1000
PulF

Pulse output frequency

v

? Occupy 2 continuous
Out

Pulse output

?

v ?

[Instruction function and effect declare]

1. PWM instruction output assigned frequency . duty factor pulse via high speed pulse output point Yn of MPU .It nonuse PLSx high speed pulse output channel ,1 high speed pulse output channel have 2 high speed pulse output point .That is the MPU with 8 channels high speed pulse can realize detection 16 channels high speed output pulse .

2. When PulF?0 no pulse output , when PulF maximum frequency then use maximum frequency .

3. When PulF>0,if PulR>0 moreover PulR<1000 ,Out output pulse of duty factor PulR . frequency Pul ,if PulR=0 then Out output low level ,if PulR?1000 then Out output high level signal.

4. PulR. PulF value can modified real time.

[Instruction example]

[Program description]

1. When M0=ON, from Y3 output pulse which duty factor is 30%. frequency is 50KHz pulse signal .

2. When M0=OFF, pulse output stop.

PLSY. D.PLSY (Pulse output)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

PLSY En, PulF, PulN, PLSx

D.PLSY En, PulF, PulN, PLSx

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?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
PulF

Pulse output frequency

v

?
PulN

Number of pulse output

v

? ?
PLSx

The channel of pulse output

v

? ?
Eno

Enable output

?

v ?
Pn

Number of pulse already output

? v

Occupy 2 system register

Pos

Current position

?

v

Occupy 2 system register

[Instruction function and effect declare]

1. PLSY is single segment pulse output instruction.

2. PulN is number of output pulse,PulN>0 express output forward pulse ;PulN<0 express output reverse pulse ;when PulN=0 and relative address mode ,express output continuous pulse not take into account numbers.

3. PulF is pulse output frequency .PulN=0 (output continuous pulse not take into account numbers), if PulF=0 then no output,PulF>0 express output forward pulse,PulF<0 express output reverse pulse. PulN?0 ,if PulF?0 then no output, PulF great than 0 however less than minimum frequency (10Hz) then according to minimum frequency output, PulF greater than maximum frequency then according to maximum frequency output

4. PLSY instruction relate to SM system state bit. SV system register, moreover generate pulse output interrupt , instruction start executing pulse output general "PLSx start output pulse " interrupt , instruction executed complete stop pulse output general " PLSx output complete" interrupt .

5. En=ON instruction executing ,Eno=ON; When pulse output process En go to OFF, then stop pulse output,Eno=OFF.

6. PLSY instruction there is not number of branches ,can coexist with others pulse output instruction ,but each pulse output channel only one instruction at the same time .

7. At instruction executing pulse output process, PulF pulse output frequency can be modified real time ,PulN can not be modified real time .

[Instruction example]

[Program description]

1. When M0=ON ,pulse output channel PLS0 use 50KHz frequency output 30000 forward pulse ,M100=ON ,output finish SM100=ON, reset M0,set M1.

2. When M1=ON ,pulse output channel PLS0 use 200KHz frequency output 150000 reverse pulse,M101=ON ,output finish SM100=ON ,reset M1.

PLSR. D.PLSR (Accelerate and decelerate pulse output)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

PLSR En, MaxF, PulN, Tms, PLSx

D.PLSR En, MaxF, PulN, Tms, PLSx

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?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
MaxF

Pulse output maximum frequency

v

? ?
PulN

Total output pulses

v

?
Tms

Accelerate and decelerate time

v

?

(5~5000ms)

PLSx

Pulse output channel

v

? ?
Eno

Enable output

?

v ?
Pn

Number of pulse already output

? v

Occupy 2 system register

Pos

Current position

?

v

Occupy 2 system register

[Instruction function and effect declare]

1. PLSR is have accelerate and decelerate single segment pulse output instruction .Tms accelerate and decelerate time , when Tms=0 express have no accelerate and decelerate , when Tms< minimum accelerate and decelerate time then according to minimum accelerate and decelerate time , when Tms> maximum accelerate and decelerate time then according to maximum accelerate and decelerate time.

2. MaxF is pulse output maximum frequency ,MaxFmust greater than 0,MaxF greater than 0 however less than minimum frequency (10Hz) then according minimum frequency output, MaxF greater than maximum frequency then according to maximum frequency output,MaxF?0 then no output, report no.3 parameter error.

3. PulN is total output pulses ,greater than 0 express output forward pulse ,less than 0express output reverse pulse, equal to 0 then no output, report no.3 parameter error .

4. PLSR instruction relate to SM system state bit. SV system register , moreover general pulse output interrupt, instruction start executing pulse output general "PLSx start output pulse " interrupt , instruction executed complete stop pulse output general " PLSx output complete" interrupt .

5. En=ON instruction executing ,Eno=ON; When pulse output process En go to OFF, instruction according to Tms slow down brake stop (no setup brake stop ),Eno=OFF.

6. PLSR instruction there is not number of branches ,can coexist with others pulse output instruction ,but each pulse output channel only one instruction at the same time .

7. At instruction executing pulse output process, MaxF. PulN can not be modified (not take effect real time be modified, need rerun instruction).

[Instruction example]

[Program description]

1. When M0=ON, pulse output channel PLS1 use 50KHz frequency output 30000 forward pulse ,accelerate and decelerate time 50ms,M100=ON, output finish SM116=ON, reset M0,set M1.

2. When M1=ON ,pulse output channel PLS1 use100KHz frequency output 200000 reverse pulse ,accelerate and decelerate time 120ms,M101=ON, output finish SM116=ON, reset M1.

3. When M55=ON ,pulse output channel PLS1 Stop pulse output.

ZRN (Origin point return)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

ZRN En, DOG, PulF, DPulF, Tms, PLSx, End

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?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
DOG

Near point signal

v

? ?
PulF

Origin return frequency

v

Occupy 2 continuous component
DPulF

Near point frequency

v

? Occupy 2 continuous component
Tms

Accelerate and decelerate time

v

? (5~5000ms)
PLSx

Pulse output channel

v

? ?
Eno

Enable output

?

v ?
End

The origin return to complete

? v ?
Pos

Current position

?

v

Occupy 2 system register

[Instruction function and effect declare]

1. When ZRN executing , according to near point frequency as the initial frequency ,accelerate to origin return frequency start moving,Slow down while approaching the origin to the near point frequency.

2. DOG = 0, said back to electrical origin.The current position > electrical origin, in order to reduce pulse direction,The current location < electric origin, in order to add pulse direction.After they back to the origin of the electric current position is set to 0.If the current location = electrical origin, the instruction is not action.

3. DOG = 1, said back to the mechanical origin, no near point signal.The current position > mechanical origin, in order to reduce pulse direction,The current location < mechanical origin, in order to add pulse direction.After they back to the origin of the mechanical ,Set the current position = mechanical origin.If the current location = mechanical origin, the instruction is not action.

4. DOG terminal specified external input point X,Said use near point signal back to the mechanical origin.When using the DOG near point signal,ZRN instruction with the function of search DOG,ZRN fixed to reduce pulse direction.

a). The current position when the outside of the DOG,ZRN instruction from near point frequency acceleration origin return frequency ,when the near point signal (DOG) from OFF to ON,started to slow down to near point frequency (Crawl speed),when the near point signal (DOG) from ON to OFF,pulse output to stop,the origin return to complete.After back to the mechanical origin, set the current position = mechanical origin.

b). The current location on the interior of the DOG or the DOG,ZRN instruction from near point frequency acceleration origin return frequency,until met LSR back limit switch to slow down to zero,then reverse forward;When the near point signal (DOG) from ON to OFF,slowed to zero and then back again;When the near point signal (DOG) from OFF to ON,started to slow down to near point frequency (Crawl speed),when the near point signal (DOG) from ON to OFF,pulse output to stop,the origin return to complete.After back to the mechanical origin, set the current position = mechanical origin.

5. When design the near point signal (DOG) , please think about DOG front and back have enough length , thus after sensed the DOG signal from OFF go to ON have enough time to decelerate to crawl frequency , no then result in position offset .

6. Near point signal (DOG) should connect to PLC MPU X input point , no then be influenced by scanning cycle result in position offset .

7. ZRN instruction relate to SM system state bit. SV system register .

8. When PulF=0,report no.3 parameter error no output pulse , no then when PulF maximum frequency then use maximum frequency .

9. When DPulF<minimum frequency (10Hz)or DPulF>maximum frequency , that is near point output frequency overrange use minimum frequency .

10. When Tms accelerate and decelerate time then use minimum accelerate and decelerate time, When Tms>maximum accelerate and decelerate time then use maximum accelerate and decelerate time.

11. After the instruction started, all of parameter can not modified ,until instruction turn off .

12. When En=OFF ,all output actions will be stop immediately .

[Instruction example]

[Program description]

1. When M0=ON,PLS0 use 50KHz frequency output 4000 forward pulse ,output complete SM100=ON,PLS1 use 50KHz frequency output 3000 forward pulse ,output complete SM116=ON.reset M0

2. When M1=ON ,set (4000,3000) to electrical origin point, mechanical origin point changed to (-4000,-3000).

3. When M2=ON,PLS0 and PLS1 to back to the origin of 20 KHZ frequency, frequency of 1 KHZ near point back to the mechanical origin,current location (4000, 3000).

4. When M3=ON,PLS0 and PLS1 to back to the origin of 20 KHZ frequency, frequency of 1 KHZ near point back to the electrical origin,current location (0, 0).

SETZ (Set electric origin point)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

SETZ En, PLSx

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?

Parameter Parameter define Input Output Declare
En

Enable

v

?
PLSx

Pulse output channel

v

? ?
Eno

Enable output

?

v ?

[Instruction function and effect declare]

When system initial ,electrical origin point is mechanical origin point .after executed SETZ instruction ,set current position to electrical origin point, current position clear zero.

[Instruction example]

[Program sketch map]

[Program description]

1. When M0=ON,PLS0 use 50KHz frequency output 4000 forward pulse ,output complete SM100=ON,PLS1 use 50KHz frequency output 3000 forward pulse ,output complete SM116=ON.reset M0

2. When M1=ON ,set (4000,3000) to electrical origin point, mechanical origin point changed to (-4000,-3000).

PPMR (Linear interpolation)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

PPMR En, XTpos, YTpos, PulF, ATms, DTms, XPLSx, YPLSx, End

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?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
XTpos

X target location

v

? Occupy 2 continuous component
YTpos

Y target location

v

Occupy 2 continuous component
PulF

Pulse output frequency

v

?

Occupy 2 continuous component

ATms

Accelerate time

v

? (5~5000ms)
DTms

Decelerate time

v

? (5~5000ms)
XPLSx

X pulse output channel

v

? ?
YPLSx

Y pulse output channel

v

? ?
Eno

Enable output

?

v ?
End

Linear interpolation complete

?

v ?

[Instruction function and effect declare]

1. PPMR instruction use current position for starting point, use (XTpos,YTpos) end point , make linear interpolation output.

2. Starting point and end point can not the same point , no then report no.3 parameter error.

3. PPMR instruction relate to SM system state bit . SV system register.

4. When PulF=0,report no.3 parameter error no pulse output , no then When PulFmaximum then use maximum frequency.

5. When ATms=0, it means there is no acceleration function. When ATms<0, it reports the error of the No.3 parameter. When ATms>maximum acceleration time or maximum deceleration time, then use the maximum acceleration time or the maximum deceleration time correspondingly. When DTms=0, it means no deceleration function. DTms<0 reports the error of the No.3 parameter. When DTms>maximum acceleration time or maximum deceleration time, then use the maximum acceleration time or the maximum deceleration time correspondingly.

6. After the instruction started, all of parameter can not modified ,until instruction turn off.

7. When En=OFF ,all output will be stop immediately.

[Instruction example]

[Program sketch map]

[Program description]

1. Via initial register table " linear interpolation parameter" setup 4 segment linear coordinate value .

Register component

Value

Declare

V1000V1001

7000

X target location0

V1002V1003

7000

Y target location0

V1004V1005

14000

X target location1

V1006V1007

0

Y target location1

V1008V1009

7000

X target location2

V1010V1011

-7000

Y target location2

V1012V1013

0

X target location3

V1014V1015

0

Y target location3

V1016V1017

50000

Pulse frequency

V1018

50

Accelerate time

V1019

50

Decelerate time

2. The program first scan cycle SM2=ON, setup PLS0. PLS1 position model to absolute address model(SM99=ON,SM115=ON).

3. X axis is PLS0,Y axis is PLS1, when M0=ON,V0=0, execute from current position (0,0) to (7000,7000) linear interpolation .

4. 1 segment interpolated complete M100=ON,V0=1, execute from (7000,7000) to (14000,0) linear interpolation .

5. 2 segment interpolated complete M100=ON,V0=2, execute from(14000,0) to (7000,-7000) linear interpolation .

6. 3 segment interpolated complete M100=ON,V0=3, execute from(7000,-7000) to (0,0) linear interpolation .

7. 4 segment interpolated complete M100=ON,V0=4,reset M0,M0=OFF.

CIMR (Circular interpolation )

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

CIMR En, XTpos, YTpos, CR, PulF, ATms, DTms, Dir, XPLSx, YPLSx, End

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?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
XTpos

X target location

v

? Occupy 2 continuous component
YTpos

Y target location

v

Occupy 2 continuous component
CR

Circle radius

v

? Occupy 2 continuous component
PulF

Pulse output frequency

v

? Occupy 2 continuous component
ATms

Accelerate time

v

? (5~5000ms)
DTms

Decelerate time

v

? (5~5000ms)
Dir

Direction of motion

v

? ?
XPLSx

X pulse output channel

v

? ?
YPLSx

Y pulse output channel

v

? ?
Eno

Enable output

?

v ?
End

Circular interpolation complete

?

v ?

[Instruction function and effect declare]

1. CIMR instruction use current position as starting point ,use (XTpos,YTpos) as end point , use CR as radius, make circular interpolation output.

2. Starting point and end point can not the same point , if radius less than half distance from staring point to end point (CRdistance from staring point to end point ), then report no.3 parameter error.

3. CR>0 express minor arc( the arc which less than semi-circle ),CR<0 express major arc (the arc which greater than semi-circle ),Dir is direction of motion(0-clockwise,1-anticlockwise)

4. CIMR instruction relate to SM system state bit. SV system register.

5. When PulF=0,report no.3 parameter error no pulse output, no then when PulF< minimum frequency (10Hz) then use minimum frequency , when PulF> maximum frequency then use maximum frequency .

6. When ATms=0, it means there is no acceleration function. When ATms<0, it reports the error of the No.3 parameter. When ATms>maximum acceleration time or maximum deceleration time, then use the maximum acceleration time or the maximum deceleration time correspondingly. When DTms=0, it means no deceleration function. DTms<0 reports the error of the No.3 parameter. When DTms>maximum acceleration time or maximum deceleration time, then use the maximum acceleration time or the maximum deceleration time correspondingly.

7. After the instruction started, all of parameter can not modified ,until instruction turn off.

8. When En=OFF ,all output will be stop immediately.

[Instruction example]

[Program sketch map]

[Program description]

1. Via initial register table " circular interpolation parameter" setup 2 segment arc coordinate value.

Register component

Value

Declare

V1000V1001

9000

X target location0

V1002V1003

0

Y target location0

V1004V1005

0

X target location1

V1006V1007

0

Y target location1

V1008V1009

4500

Circle radius

V1010V1011

50000

Pulse frequency

V1012

60

Accelerate time

V1013

60

Decelerate time

2. The program first scan cycle SM2=ON, set PLS1. PLS3 position model absolute addressModel(SM115=ON,SM147=ON).

3. X axis is PLS1,Y axis is PLS3, when M0=ON,V0=0,executing anticlockwise circular interpolation according to current position(0,0) for starting point (9000,0) radius is 4500.

4. 1 segment circular interpolation completeM100=ON,V0=1,executing anticlockwise circular interpolation from (9000,0) to (0,0) radius is 4500 .

5. 2 segment circular interpolation completeM100=ON,V0=2,reset M0,M0=OFF.

SPLS (Single pulse output)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

SPLS En, MaxF, PulN, Tms, Out, End, Pn

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?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
MaxF

Pulse output maximum frequency

v

? Occupy 2 continuous component
PulN

Total number of pulse output

v

Occupy 2 continuous component
Tms

Accelerate and decelerate time

v

?

(5~5000ms)

Out

Pulse output

?

v

?
End

Pulse output complete

?

v ?
Pn

Number of pulse already output

?

v Occupy 2 continuous component

[Instruction function and effect declare]

1. SPLS instruction via MPU high speed pulse output point Yn output high speed pulse, it not use PLSx high speed pulse output channel,1 high speed pulse output channel have 2 high speed output points. Thus MPU with 8 pulse output channel can carry out 16 high speed pulse outputs.

2. SPLS instruction only output pulse, direction need controlled by Y output point in the program ,it will not generate pulse output interruption ,not use SM. SV.

3. When Tms=0 express no accelerate and decelerat, no then when Tmsmaximum accelerate and decelerate time then use maximum accelerate and decelerate time.

4. When MaxF?0 no pulse output , no then when MaxF< minimum frequency (10Hz) then use minimum frequency , when MaxF> maximum frequency then use maximum frequency .

5. When PulN=0 express not take into account pulse output ;when PulN>0 then according to PulN pulses output, pulse output complete End set; when PulN<0 no pulse output .

6. MaxF can be modified real time ,PulN can not be modified real time .

[Instruction example]

[Program description]

1. When M0=ON ,Y3 use 50KHz frequency output 30000 pulses ,Y15=OFF(OFF express forward direction),M100=OFF

2. When pulse output complete,M100=ON, reset M0, set M1.

3. When M1=ON ,Y3 use 200KHz frequency output 15000 pulses ,Y15=ON (ON express reverse direction),M101=OFF

4. When pulse output complete ,M101=ON, reset M1.

MPTO (Multi-segment pulse output)

Instruction format and parameter specification

Language

LD

FBD

IL Program example

Instruction format

MPTO En, Tbl, N, Tms, PLSx

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?

Parameter Parameter define Input Output Declare

En

Enable

v

Tbl

Segment starting address

v

Occupy 4N continuous component

N

Segment number

v

1~256

Tms

Acceleration/Deceleration time(unit:1ms)

v

(5~5000ms)

PLSx

Channel of pulses output

v

Eno

Enable output

v

Pn

The current segment number

v

Occupy 1 system register

Pos

Current position

v

Occupy 2 system register

[Instruction function and effect declare]

1.MPTO is the multi-segment pulse output instruction, Tbl is segment start element, each segment occupies four registers, the first two registers are used for the frequency of the pulse output, the last two registers are used for the number of the pulse output .

2. If the segment frequency is less than the minimum frequency (10Hz),then the output will be in accordance with the minimum frequency, if the segment frequency is greater than the maximum frequency,then the output will be in accordance with the maximum frequency output.

3.If the segment pulse value is greater than 0, it means a forward pulse output. If the pulse value is less than 0, it means a reverse pulse. If the pulse value is 0, it means no output and it will generate a report of No.3 parameter error.

4. When Tms = 0, it means no acceleration/deceleration; when Tms <minimum acceleration/deceleration time,then it will use the minimum acceleration/deceleration time. When Tms> maximum acceleration/deceleration time, then it will use the maximum acceleration/deceleration time.

5. If there are frequency differences between the different segments, MPTO will make a smooth shift based on acceleration and deceleration time(Tms).

6. MPTO instruction relate to SM system state bit. SV system register, and it will generate a pulse output interrupt. The interrupt "PLSx start pulse output" is generated when the pulse output is started. The interrupt "PLSx pulse output is ended" will be generated when the output pulse is finished after the instruction execution completed .

7. When En= ON the instruction is executed,then Eno=On. When "En" changes from "ON" to "OFF",the instruction will slow down to stop according to the Tms (if the brake is not set in advance), then Eno=OFF.

8. There is no limit on the number of MPTO instructions. It can can coexist with other pulse instructions, but each pulse output channel can only execute one instruction at one time.

9.During the pulse output, the pulse frequency and pulse number of current segment and the next segment can not be modified (the modification will not take effect), and the other segment data can be modified in real time.

[Instruction example]

This example uses the multi-segment pulse output instruction MPTO to control the servo to move forward or backward.

The "Forward Segment Data" is defined as follows:

Register components

32-bit register value

Note

V1000V1001

10000

Forward Segment 1 Frequency

V1002V1003

25000

Forward Segment 1 Pulse Numbe

V1004V1005

50000

Forward Segment 2 Frequency

V1006V1007

100000

Forward Segment 2 Pulse Numbe

V1008V1009

50000

Forward Segment 3 Frequency

V1010V1011

120000

Forward Segment 3 Pulse Numbe

V1012V1013

15000

Forward Segment 4 Frequency

V1014V1015

23000

Forward Segment 4 Pulse Numbe

The "Backward Segment Data" is defined as follows:

Register components

32-bit register value

Note

V1020V1021

5000

Backward Segment 1 Frequency

V1022V1023

-9000

Backward Segment 1 Pulse Number

V1024V1025

30000

Backward Segment 2 Frequency

V1026V1027

-45000

Backward Segment 2 Pulse Number

V1028V1029

10000

Backward Segment 3 Frequency

V1030V1031

-20000

Backward Segment 3 Pulse Number

[Program sketch map]

[Program description]

1.When M0 = ON, the MPTO instruction of Network 1 is loaded and executed. If there is no error in the parameter, PLS2 starts to output pulses (Y4 pulse, Y5 direction). SM132 is reset to generate interrupt 5 (PLS2 starts output pulse), M100=ON.

2.When the four forward segments pulses output are completed, SM132 is set to generate interrupt 6 (PLS2 output pulse is finished), because M0 = ON, SM132 = ON, M100 = ON, execute "RST M0" and "SET M1", M0 = OFF, M1 = ON.

3.When M1 = ON, the MPTO instruction of Network 2 is loaded and excuted. If there is no error in the parameter, PLS2 starts to output pulse (Y4 pulse, Y5 direction). SM132 is reset ato generate interrupt 5 (PLS2 starts to output pulse) M101=ON.

4.When the 3 backward segments pulse output is completed, SM132 is set and it generates interrupt 6 (PLS2 output pulse is finished). M1 = ON, SM132 = ON, M101 = ON. Execute "RST M1", M1 = OFF.

SYNP (Synchronization pulse output)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

SYNP En, RMul, RDiv, PulN, Maxis, SPLSx

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?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
RMul

Multiplying factor

v

?

Occupy 2 continuous component

RDiv

Divide factor

v

?

Occupy 2 continuous component

PulN

Number of delay pulses

v

?

Maixs

Main axis

v

? ?
SPLSx

Pulse output channel

v

? ?
Eno

Enable output

?

v ?
SPos

Slave current position

v

Occupy 2 system register

[Instruction function and effect declare]

1.SYNP instruction realizes electronic gear function, specifing that the slave axis SPLSx pulse output follows the change of the pulse of master axis Maxis, the ratio between them coefficient K = RMul / RDiv. If K> 0 then the direction of the slave axis pulse is the same as the master axis. If K <0, the direction of the slave axis pulse is opposite to the master axis.

2.Maxis is defined as the master axis. When Maxis are specified as X0, X2, X4, X6, X8, X10, X12 and X14, they indicate the high-speed pulse input channels HSC0~ HSC7. When Maxis are specified as Y0, Y2, Y4, Y6, Y8, Y10, Y12 and Y14, they indicate that the master slave high-speed pulse output channels PLS0~ PLS7.

3.PulN specifies the number of delay pulses. After Maxis inputs "pulN" pulses, SPLSx starts to follow Maxis. If PulN ?0,it indicates no delay.

4.When multiple SYNP instructions execute at the same time , Maxis can be repeated, SPLSx can not be repeated, that is to say a master axis can drive multiple slave axises.

5.SYNP instruction relate to SM system state bit . SV system register , If Maxis is high-speed pulse input channel, it will generate high-speed counter direction change interrupt.

6.SYNP instruction does not have the limitation on the number, it can coexist with other pulse output instructions, but each pulse output channel can only execute one instruction at the same time.

7.After this instruction is started, the parameters RMul and RDiv can be modified in real time.

[Instruction example]

[Program description]

1. X10=ON, then M0=ON,SYNP instruction executing ,PLS1 after delay 15 pulses ,use 1:1 HSC0 pulse input to output.

2. X11=ON, then M0=OFF, SYNP instruction executing stop.

PSTOP (Stop pulse output)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

PSTOP En, PLSx

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
PLSx

Pulse output channel

v

? ?
Eno

Enable output

?

v ?

[Instruction function and effect declare]

PSTOP instruction refer to PLSx Stop pulse output .

[Instruction example]

Refer to PLSR instruction example.

DVIT (Interrupt positioning pulse output)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

DVIT En, MaxF, PulN, Tms, X, OutF, OutN, PLSx

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?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
MaxF

Pulse output frequency

v

Occupy 2 continuous component

PulN

Number of pulse output

v

?

Occupy 2 continuous component

Tms

Pulse output frequency

v

?
X

Number of pulse output

v

? ?
OutF

Pulse output frequency

v

Occupy 2 continuous component

OutN

Number of pulse output

v

?

Occupy 2 continuous component

PLSx

The channel of pulse output

v

? ?
Eno

Enable output

?

v ?
Pn

Number of pulse already output

? v

Occupy 2 system register

Pos

Current position

?

v

Occupy 2 system register

[Instruction function and effect declare]

1. DVIT is interrupt positioning pulse output instruction. Tms is the acceleration and deceleration time, when the Tms = 0 indicates no acceleration or deceleration, or when the Tms <minimum acceleration and deceleration time, use the minimum acceleration and deceleration time, when the Tms> maximum acceleration and deceleration time, use the maximum acceleration and deceleration time.

2. PulN means the number of output pulses, PulN> 0 indicates the positive pulse output , PulN <0 indicates the reverse pulse output , PulN = 0 and when it's in relative address mode, indicates the pulses output continuously without counting the number of pulse.

3. MaxF means pulse output frequency. when PulN = 0 (continuous pulse output without counting the number of pulses), if MaxF = 0,it means no output, if MaxF> 0 indicates the positive pulse output, if MaxF <0 ,it means the reverse pulse output. When PulN ? 0, if MaxF?0 no output, if MaxF is greater than zero but less than the minimum frequency (10Hz) ,then it will use the minimum frequency output, if MaxF is greater than the maximum frequency,then it will use the maximum output frequency.

4. X means external interrupt signal, when the input X signal is detected,the instruction will perform the pulse output at OutF frequency,when the pulse number reach OutN,then pulse output stop , OutN> 0 indicates the positive pulse output, OutN <0 indicates the reverse pulse output, OutF = 0 or OutN = 0 means no pulse output.

5. If the X interrupt signal is detected after the completement of the PulN's specify number of pulses output ,then the new pulse output which is after the interrupt will not be executed.

6. External interrupt signal X should be connected to the X input point of the host PLC , otherwise the scanning period will lead to its positional deviation.

7. DVIT instruction relate to SM system state bit. SV system register, moreover generate pulse output interrupt , instruction start executing pulse output general "PLSx start output pulse " interrupt , instruction executed complete stop pulse output general " PLSx output complete" interrupt .

8. En=ON instruction executing ,Eno=ON; When pulse output process En go to OFF, then stop pulse output,Eno=OFF.

9. DVIT instruction there is not number of branches ,can coexist with others pulse output instruction ,but each pulse output channel only one instruction at the same time .

10. When the instruction is executing the pulse output, only if PulN=0 the MaxF can be modified in real-time, and in all other cases the Real-Time parameters can not be modified.

[Instruction example]

[Program description]

1. When M0 = ON, pulse output channel PLS0 perform continuous output at 200KHz; when X0 = ON, it will perform 3000 pulses output at 50KHZ and then stop.

2. During the execution of the instruction, if M0 = OFF, the pulse output is stopped.

ECAM (Electronic CAM)

Instruction format and parameter specification

Language

LD

FBD

IL Program example

Instruction format

ECAM En, Pval, Step, MMaxF, Tms, Mod, Maxis, SPLSx, StepN

Download

?

Parameter Parameter define Input Output Declare

En

Enable

v

Pval

CAM curve starting address

v

Occupy 4*Step continuous component

Step

The number of steps

v

MMaxF

Main-Axis maximum output frequency

v

Occupy 2 continuous component

Tms

Acceleration/Deceleration time(unit:1ms)

v

(5~5000ms)

Mod

CAM mode

v

Maxis

Main axis

v

?

SPLSx

Slave channel of pulses output

v

Eno

Enable output

v

StepN

Current step number

v

SPos

Slave current position

v

Occupy 2 system register

[Instruction function and effect declare]

1.ECAM is the electronic cam instruction. Tms is the acceleration/deceleration time. When Tms = 0, it means the acceleration/deceleration will not be performed. Otherwise, when Tms <minimum acceleration and deceleration time, then it will use the minimum acceleration and deceleration time. When Tms> maximum acceleration / deceleration time,then it will use the maximum acceleration/deceleration time.

2.Pval defines the cam curve, the number of curve junctions (steps) is Step, the maximum number of steps is 256, the format is as follows:

Pval Component No.

CAM curve Steps

Pval Component definition

Pval+0 Pval+1

1

main axis position of the step 1

Pval+2 Pval+3

slave axis position of the step 1

Pval+4 Pval+5

2

main axis position of the step 2

Pval+6 Pval+7

slave axis position of the step 2

?

?

?

Pval+28 Pval+29

8

main axis position of the step 8

Pval+30 Pval+31

slave axis position of the step 8

3.MaxF is the pulse output frequency. If MaxF?0, it will not output. If MaxF is greater than 0 but smaller than the minimum frequency (10Hz), MaxF will output according to the maximum frequency.

4.Maxis defines the main axis. When Maxis is designated as X0, X2, X4, X6, X8, X10, X12 and X14,it means the main axis is high-speed pulse input channels HSC0~ HSC7. When Maxis is designated as Y0, Y2, Y4, Y6, Y8, Y10, Y12, and Y14 it indicates that the main axis is high-speed pulse output channels PLS0~ PLS7. When Maxis is specified as SM0, the main axis means is the virtual time axis (unit: us). When using the time axis, the main axis curve points are time value, main axis pulse number = The main axis time value * MaxF/1000000 .

5.SPLSx defines the pulse output slave axis, SPos is the current position of the slave. The ECAM instruction has the memory function when the slave axis is in the absolute address positioning mode. The ECAM instruction will continue to output the pulse from the current position according to the judgement of the current position of the slave axis and the pulse direction.

6.Mod defines the cam working mode. Mod = 0 means the loop is executed. If the main axis is a high-speed pulse input or a virtual time axis, the current count value or time value will be automatically reset at the end of each step. Mod = 1 means single execution. If the main axis is high-speed pulse input or a virtual time axis, the current count value or time value will be automatically reset at the end of each step. Mod = 2 means that the loop is executed, it will not automatically reset the current count value or time value; Mod = 3 means a single execution, it will not automatically reset the current count value or time value.

7.ECAM instruction relate to SM system state bit. SV system register, and will generate a pulse output interrupt. When the instruction is excuted, it will generate the interrupt "PLSx start output pulse" when every cam curve step start the output pulse. At the completion of each step of the cam curve, the "PLSx Output Pulse End" interrupt is generated.

8.When En = ON, the instruction is executed,then Eno=ON. When "En" changes from "ON" to "OFF" during the pulse output, then the pulse output is stopped, Eno = OFF.

9.There is no limit on the number of ECAM instructions. It can can coexist with other pulse instructions, but each pulse output channel can only execute one instruction at one time.

10.When multi ECAM instructions are executed, Maxis can be repeated, SPLSx can not be repeated, that is to say a main axis can drive multiple slave axis.

11.During execution of pulse output, the cam curve parameters can be modified in real time except the current step parameter.

[Instruction example]

[Program sketch map]

[Program description]

1.Set the 2 segements of cam curve via the initial register value table "Electronic cam curve".

Component No.

Cam curve step

Component value

Component definition

V1000V1001

1

30000

main axis position of the step 1

V1002V1003

2000

slave axis position of the step 1

V1004V1005

2

30000

main axis position of the step 2

V1006V1007

0

slave axis position of the step 2

2.SM2 = ON is set by default already,then set SM115 = ON, set the slave axis namely the pulse output channel PLS1 positioning mode at the absolute address.

3.Mod = 0 indicates the loop execution, the main axis is a high-speed pulse input or virtual time axis,at the end of each step it will automatically reset the current count value or time value. The program defines the main axis as X0, that is, the main axis is high-speed pulse input channel HSC0. X0 input pulse from 0~30000, the count value will be reset to 0 automatically after the completion of the first step.

4.When M0 = ON, the ECAM instruction is executed. The pulse of the main axis HSC0 counts from 0~30000,and after the automatic reset it counts from 0 to 30000 again. From 0 to 2000, the slave axis PLS1 counts from 0 to 2000 and returns to 0 and completes one cycle, then over and over again.

JOGP (Jog pulse output)

Instruction format and parameter specification

Language

LD

FBD

IL Program example

Instruction format

JOGP En, FWD, REV, PulF, PLSx

Download

?

Parameter Parameter define Input Output Declare

En

Enable

v

FWD

Forward

v

REV

Reverse

v

PulF

Frequency of output pulses

v

Occupy 2 continuous component

PLSx

Channel of pulses output

v

Eno

Enable output

v

Pos

Current position

v

Occupy 2 system register

[Instruction function and effect declare]

1.JOGP is the jog pulse output instruction. This instruction is executed when En = ON and the instruction is not executed when En = OFF.

2.PulF is the pulse output frequency. If PulF?0, it will not output. If PulF is greater than 0 but less than the minimum frequency (10Hz), the output will be in accordance with the minimum frequency. If PulF is greater than the maximum frequency, the output will be in accordance with the maximum frequency.

3.When the time of "FWD = ON" is less than 0.5s, a forward pulse will be output. When the time of "FWD = ON" is greater than 0.5s, a continuous forward pulse will be output at PulF frequency.

4.When the time of "REV = ON" is less than 0.5s, a reverse pulse will be output, when the time of "REV = ON" is greater than 0.5s, then a continuous reverse pulse will be output at PulF frequency.

5.When the FWD and REV are both ON, then no pulse output.

6. There is no limit on the number of JOGP instructions. It can can coexist with other pulse instructions, but each pulse output channel can only execute one instruction at one time.

[Instruction example]

[Program description]

1.When M0 = ON, if the time of "M100 = ON" is less than 0.5s, it will output a forward pulse. When the time of "M100 = ON" is longer than 0.5s, it will output continuous forward pulse at 1000Hz.

2.When M0 = ON, if the time of "M101 = ON" is less than 0.5s, it will output a reverse pulse. When the time of "M101 = ON" is longer than 0.5s, it will output continuous reverse pulse at 1000Hz.

Compare instruction


Compare instruction list as follows

Instruction name 8 bit model 32 bit model Instruction function Support language
LD FBD IL
CMP

?

D.CMP

Compare instruction

v

v

v

ZCP

?

D.ZCP

Regional comparison

v

v

v

MATC

?

D.MATC

Numerical value match

v

v

v

ABSC

?

D.ABSC

Absolute cam comparison

v

v

v

BON ?

ON bit determine

v

v

v

BONC ? D.BONC

ON bit numbers

v

v

v

MAX ?

D.MAX

Maximum

v

v

v

MIN

?

D.MIN

Minimum

v

v

v

SEL

?

D.SEL

Selection of conditions

v

v

v

MUX

?

D.MUX

Multi-choice

v

v

v

CMP. D.CMP(Compare)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

CMP En, In1, In2, Out

D.CMP En, In1, In2, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In1

Input1

v

? ?
In2

Input2

v

? ?
Out

Status output

?

v Occupy 3 continuous component

[Instruction function and effect declare]

CMP is 16 bit integer compare instruction (D.CMP is 32 bit integer compare), at the same time output>. =. < these 3 result.

[Instruction example]

[Program description]

1. 16 bit compare CMP instruction, when AI1>500 then M10=ON, when AI1=500 then M11=ON, when AI1<500 then M12=ON.

2. 32 bit compare D.CMP instruction, when V10V11>V0V1 then M20=ON, when V10V11=V0V1 then M21=ON, when V10V11<V0V1 then M22=ON.

ZCP. D.ZCP(Regional comparison)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

ZCP En, In, Up, Down, Out

D.ZCP En, In, Up, Down, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In

Input

v

? ?
Up

Regional upper limit

v

? ?
Down

Regional lower limit

v

? ?
Out

Status output

?

v Occupy 3 continuous component

[Instruction function and effect declare]

1. ZCP is 16 bit integer regional compare instruction(D.CMP is 32 bit integer regional compare ),at the same time output >. =. < these 3 result.

2. If regional upper limit Up < regional lower limit Down, then instruction will swap them automatic .

[Instruction example]

[Program description]

1. 16 bit compare ZCP instruction , when AI1>3000 then M10=ON, when AI1?3000 moreover AI1?500 then M11=ON, when AI1<500 then M12=ON.

2. 32 bit compare D.ZCP instruction, when V0V1>V1000V1001 then M20=ON, when V0V1?V1000V1001 moreover V0V1?V1002V1003 then M21=ON, when V0V1

MATC. D.MATC(Numerical match)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

MATC En, In, Par, N, Out

D.MATC En, In, Par, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?

In

Input

v

?

?

Par

Numerical value match start component

v

?

MATC: occupy N continuous component, D.MATC: occupy 2N continuous component

N

Number to compare

v

?

1~256

Out

Status output

?

v

?

[Instruction function and effect declare]

MATC instruction compare In input and N data start from Par ,if In equal to one of then express match right Out=ON, no then Out=OFF.

[Instruction example]

[Program description]

1. MATC instruction get electricity from busbar and always execute .

2. As long as V0 equal to one of V1000. V1001. V1002. V1003. V1004. V1005 then match right M0=ON, no then M0=OFF.

ABSC. D.ABSC(Absolute cam comparison)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

ABSC En, In, Par, N, Out

D.ABSC En, In, Par, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?

In

Input

v

?

?

Par

Multi-segment compare start component

v

?

ABSC: occupy 2N continuous component ,D.ABSC: occupy 4 continuous component

N

Number of compare segments

v

?

1-64

Out

Start address of compare result

?

v

Occupy N continuous component

[Instruction function and effect declare]

1. ABSC instruction region compare In input N segment data start from Par ,compare results output to start from out N continuous component.

2. To the segment which lower limit ? upper limit , if lower limit?In? upper limit, then compare result of the segment Output=ON, if Inupper limit, then compare result of the segment Output =OFF.

3. To the segment which lower limit>upper limit,if upper limit?In? lower limit, then compare result of the segment Output=OFF, if In>lower limit or In compare result of the segment Output=ON.

4. Parameter Par and N relation declare:

Number

Number of compare segments N

Par component meaning

Out component meaning

1

1

1 segment lower limit

1 segment compare result output

2

1 segment upper limit

3

2

2 segment lower limit

2 segment compare result output

4

2 segment upper limit

?

?o:p>

?o:p>

?o:p>

15

8

8 segment lower limit

8 segment compare result output

16

8 segment upper limit

[Instruction example]

[Program sketch map]

Par component

Value

Declare

V1000

40

1 segment lower limit

V1001

100

1 segment upper limit

V1002

120

2 segment lower limit

V1003

210

2 segment upper limit

V1004

140

3 segment lower limit

V1005

60

3 segment upper limit

V1006

150

4 segment lower limit

V1007

390

4segment upper limit

[Program description]

1. M0=ON,region compare V0 and start from V1000 4 segment.

2. When V0 is 40~100,Y0=ON, no then Y0=OFF; when V0 is 120~210 ,Y1=ON, no then Y1=OFF; when V0 is 60~140 ,Y2=OFF, wo then Y2=ON; when V0 is 150~390,Y3=ON, no then Y3=OFF.

3. When M0=OFF, instruction stop execute ,Y0~Y3 remain unchanged.

BON(ON bit determine)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

BON En, In, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

?
In

Input

v

? ?
N

Which bit

v

? 1~16
Out

Status output

?

v ?

[Instruction function and effect declare]

BON instruction use to determine the bit of the register whether or not 1,result output to Out.

[Instruction example]

[Program description]

1. BON instruction get electricity from busbar and always execute

2. If V0=8( binary 00000000 00001000, fourth bit is 1), then M0=ON.

BONC. D.BONC(ON bit numbers)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

BONC En, In, Out

D.BONC En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

BONC instruction get the number which the bit is 1 of the register, result output to Out.

[Instruction example]

[Program description]

1. BONC instruction get electricity from busbar and always execute

2. If V0=1234(binary 00000100 11010010, total 5 bits are 1),then V100=5.

MAX. D.MAX(Maximum)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

MAX En, Par, N, Out

D.MAX En, Par, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?

Par

Compare value start component

v

?

MAX: occupy N continuous component, D.MAX: occupy 2N continuous component

N

Number data for compare

v

? 2~256
Eno

Enable output

?

v

?
Out

Compare result output

v ?

[Instruction function and effect declare]

MAX instruction compare N data start from Par ,maximum output to Out.

[Instruction example]

[Program description]

1. M0=ON, if V1000=30. V1001=-150. V1002=25. V1003=8. V1004=95. V1005=-20, then V0=95.

2. M0=ON, if V1100V1101=30000. V1102V1103=-50000. V1104V1105=23000. V1106V1107=600. V1108V1109=1500, then V10V11=30000.

3. When M0=OFF, instruction stop execute ,Out remain unchanged.

MIN. D.MIN(Minimum)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

MIN En, Par, N, Out

D.MIN En, Par, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?

Par

Compare value start component

v

?

MIN: occupy N continuous component, D.MIN: occupy 2N continuous component

N

Number data for compare

v

? 2~256
Eno

Enable output

?

v ?
Out

Compare result output

?

v ?

[Instruction function and effect declare]

MIN instruction compare N data start from Par ,minimum output to Out.

[Instruction example]

[Program description]

1. M0=ON, if V1000=30. V1001=-150. V1002=25. V1003=8. V1004=95. V1005=-20, then V0=-150.

2. M0=ON, if V1100V1101=30000. V1102V1103=-50000. V1104V1105=23000. V1106V1107=600. V1108V1109=1500, then V10V11=-50000.

3. When M0=OFF, instruction stop execute ,Out remain unchanged.

SEL. D.SEL(Selection of conditions)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

SEL En, G, In1, In2, Out

D.SEL En, G, In1, In2, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
G

selection condition

v

?
In1

select data 1

v

? ?
In2

select data 2

v

? ?
Eno

Enable output

?

v ?
Out

Select result output

?

v ?

[Instruction function and effect declare]

SEL instruction is either-or instruction, G=OFF then Out=In1,G=ON then Out=In2.

[Instruction example]

[Program description]

1. SEL instruction get electricity from busbar and always execute.

2. If AI0=230. AI1=512, M0=OFF then V0=230,M0=ON then V0=512.

MUX. D.MUX(Multi-choice)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

MUX En, K, Par, N, Out

D.MUX En, K, Par, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
K

Select channel

v

?
Par

Select data start component

v

?

MUX: occupy N continuous component ,D.MUX: occupy 2N continuous component

N

Number of data be selected

v

? 1~256
Eno

Enable output

?

v ?
Out

Select result o utput

?

v ?

[Instruction function and effect declare]

MUX instruction select one of data according to the value of select channel K(K=0~N-1) from N address continuous register output to Out (multi select one). schematic diagram as follows:

[Instruction example]

[Program description]

1. MUX instruction get electricity from busbar and always execute.

2. If V1000=30. V1001=-150. V1002=25. V1003=8. V1004=95. V1005=-20, when V00=3 express select fourth value output,V10=8.

Shift instruction


Shift instruction list as follows

Instruction name 8 bit model 32 bit model Instruction function Support language
LD FBD IL
LBST

?

? Low byte evaluation

v

v

v

HBST ? ? High byte evaluation

v

v

v

MOV ?

D.MOV

Move

v

v

v

BMOV ?

?

Block move

v

v

v

FILL ?

?

Fill

v

v

v

XCH ?

?

Byte swap

v

v

v

BXCH ?

?

Block swap

v

v

v

SHL ?

?

Bit left shift

v

v

v

SHR ?

?

Bit right shift

v

v

v

WSHL ?

?

Word left shift

v

v

v

WSHR ?

?

Word right shift

v

v

v

ROL ?

?

Bit rotate left shift

v

v

v

ROR ?

?

Bit rotate right shift

v

v

v

WROL ?

?

Word rotate left shift

v

v

v

WROR

?

?

Word rotate right shift

v

v

v

BSHL

?

?

Byte left shift

v

v

v

BSHR

?

?

Byte right shift

v

v

v

ATBL

?

?

Append to array

v

v

v

FIFO

?

?

First in first out

v

v

v

LIFO

?

?

Last in first out

v

v

v

SORT

?

?

Data sort

v

v

v

LBST(Low byte evaluation)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

LBST En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?
Out

Data output

?

v ?

[Instruction function and effect declare]

LBST use for specified assignment to the low byte of output register Out , high byte remain unchanged.

[Instruction example]

[Program description]

If initial V1000=0x1E34,then M0=ON V1000=0x1E0C.

HBST(High byte evaluation)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

HBST En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?
Out

Data output

?

v ?

[Instruction function and effect declare]

HBST use for specified assignment to the high byte of output register Out , low byte remain unchanged.

[Instruction example]

[Program description]

If initial V1001=0xFF6A,then M1=ON V1001=0x856A

MOV. D.MOV(Move)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

MOV En, In, Out

D.MOV En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?
Out

DataOutput

?

v ?

[Instruction function and effect declare]

Move instruction MOV also call assign instruction, use for assign the specified data to output register Out.

[Instruction example]

[Program description]

Assign the initial value will the program first scan cycle,V0=80,V10V11=-50.

BMOV(Block move)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

BMOV En, Sou, N, Des

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?

Sou

Block move start address component

v

?

Occupy N continuous component

N

Number to be moved

v

?

1~256

Eno

Enable output

?

v ?
Des

Target block move start address component

?

v

Occupy N continuous component

[Instruction function and effect declare]

BMOV block move instruction move N components start from Sou to N components start Des .As follows:

[Instruction example]

[Program description]

When M0=ON, Move V1000~V1005 to V0~V5, Move X0~X4 to Y2~Y6.

Sou component

Initial value

Move result

V1000

30

V0=30

V1001

-150

V1=-150

V1002

25

V2=25

V1003

8

V3=8

V1004

95

V4=95

V1005

-20

V5=-20

X0

ON

Y2=ON

X1

OFF

Y3=OFF

X2

ON

Y4=ON

X3

ON

Y5=ON

X4

OFF

Y6=OFF

FILL(Fill)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FILL En, In, N, Des

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?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In

Data to fill

v

? ?
N

Number of fill data

v

? 1~256
Eno

Enable output

?

v ?
Des

Move target block start component

?

v

Occupy N continuous component

[Instruction function and effect declare]

Fill instruction FILL use for fill the In value into Des start N component.Can use for batch reset . set register component and bit component.As follows:

[Instruction example]

[Program description]

When M0=ON, Reset V100~104 5 registers to 0, reset Y0~Y11 to OFF, set M100~M105 to ON.

XCH(Byte swap). D.XCH(Register swap)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit Instruction format

XCH En, Sou, N

D.XCH En, Sou, N

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?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Start register to swap

v

?

Occupy N continuous component

N

Number of swap registers

v

? 1~256
Eno

Enable output

?

v ?

[Instruction function and effect declare]

1. 16 bit instruction XCH is byte swap , use for start from Sou N registers swap the high low byte .As follows:

2. 32 bit instruction D.XCH is register swap ,use for start from Sou N register component each border upon 2 register swap, if N is odd then the last one register unchanged.As follows:

3. XCH instruction general executed by edge.

[Instruction example]

[Program description]

When M0=ON, Swap high low byte of V1000. V1001 these 2 registers ,swap V1002. V1003 these 2 registers ,swap V1004. V1005 these 2 registers .

Sou component

Initial value

Swap result

V1000

30 (0x001E)

V1000=7680 (0x1E00)

V1001

-150 (0xFF6A)

V1001=27391(0x6AFF)

V1002

25

V1002=8

V1003

8

V1003=25

V1004

95

V1004=-20

V1005

-20

V1005=95

BXCH(Block swap)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

BXCH En, Sou1, Sou2, N

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?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou1

Source 1 start component

v

?

Occupy N continuous component

Sou2

Source 2 start component

v

?

Occupy N continuous component

N

Number of component

v

? 1~256
Eno

Enable output

?

v ?

[Instruction function and effect declare]

1. Block swap instruction BXCH use for start from Sou1 N components and start from Sou2 N components.As follows:

2. BXCH instruction general executed by edge.

[Instruction example]

[Program description]

When M0=ON, Swap V1000~V1002 these 3registers and V1003~V1005 these 3 register.

component

Initial value

Swap result

V1000

30

V1000=8

V1001

-150

V1001=95

V1002

25

V1002=-20

V1003

8

V1003=30

V1004

95

V1004=-150

V1005

-20

V1005=25

SHL(Bit left shift)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

SHL En, In, Sou, N, Num, Out

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?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Bit shift start component

v

?

Occupy Num continuous component

Sou

Source start component

v

?

Occupy Num continuous component

N

Number of component

v

? 1~256
Num

Shift times

v

? ?
Eno

Enable output

?

v ?
Out

Shift out component

?

v

Occupy Num continuous component

[Instruction function and effect declare]

1. According to Num a group,SHL instruction use start from Sou N components left shift Num bit, shift start from In Num components ,shift out start from Out Num components.As follows:

2. If Sou is register component, then use start from Sou N registers left shift bitwise Num bit.

3. 1?Num?N, no then instruction not execute.

4. SHL instruction general executed by edge.

[Instruction example]

[Program description]

1. When M0=ON, M100~M105 left shift 3 bit, shift in X0~X2,shift out put Y0~Y2.

Sou component

Initial value

Left shift result

M100

ON

M100=OFF

M101

OFF

M101=ON

M102

ON

M102=ON

M103

ON

M103=ON

M104

ON

M104=OFF

M105

OFF

M105=ON

X0

OFF

?

X1

ON

?

X2

ON

?

Y0

?

Y0=ON

Y1

?

Y1=ON

Y2

?

Y2=OFF

2. When M1=ON,V1000~V1005 bitwise left shift 3 bits, shift in X0~X2,shift out to M200~M202.

Sou component

Initial value

Left shift result

V1000

00000000 00011110

V1000=00000000 11110110

V1001

11111111 01101010

V1001=11111011 01010000

V1002

00000000 00011001

V1002=00000000 11001111

V1003

00000000 00001000

V1003=00000000 01000000

V1004

00000000 01011111

V1004=00000010 11111000

V1005

11111111 11101100

V1005=11111111 01100000

X0

OFF

?

X1

ON

?

X2

ON

?

M200

?

M200=ON

M201

?

M201=ON

M202

?

M202=ON

SHR(Bit right shift)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

SHR En, In, Sou, N, Num, Out

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?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Bit shift start component

v

Occupy Num continuous component

Sou

Source start component

v

?

Occupy N continuous component

N

Number of component

v

? 1~256
Num

Shift times

v

? ?
Eno

Enable output

? v ?
Out

Shift out component

?

v

Occupy Num continuous component

[Instruction function and effect declare]

1. According to Num a group ,SHR instruction use start from Sou N components right shift Num bit, shift start from In Num components ,shift out start from Out Num components.As follows:

2. If Sou are register component, then use start from Sou N registers right shift bitwise Num bit .

3. 1?Num?N, no then instruction not executed.

4. SHR instruction general executed by edge.

[Instruction example]

[Program description]

1. When M0=ON,M100~M105 right shift 3 bits, shift in X0~X2,shift out to Y0~Y2.

Sou component

Initial value

Right shift result

M100

ON

M100=ON

M101

OFF

M101=ON

M102

OFF

M102=OFF

M103

ON

M103=OFF

M104

ON

M104=ON

M105

OFF

M105=ON

X0

OFF

?

X1

ON

?

X2

ON

?

Y0

?

Y0=ON

Y1

?

Y1=OFF

Y2

?

Y2=OFF

2. When M1=ON,V1000~V1005 right shift 3 bits bitwise, shift in X0~X2,shift out to?M200~M202.

Sou component

Initial value

Right shift result

V1000

00000000 00011110

V1000=01000000 00000011

V1001

11111111 01101010

V1001=00111111 11101101

V1002

00000000 00011001

V1002=00000000 00000011

V1003

00000000 00001000

V1003=11100000 00000001

V1004

00000000 01011111

V1004=10000000 00001011

V1005

11111111 11101100

V1005=11011111 11111101

X0

OFF

?

X1

ON

?

X2

ON

?

M200

?

M200=OFF

M201

?

M201=ON

M202

?

M202=ON

WSHL(Word left shift)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

WSHL En, In, Sou, N, Num, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Word shift start component

v

Occupy Num continuous component

Sou

Source start component

v

?

Occupy N continuous component

N

Number of component

v

? 1~256
Num

Shift times

v

? ?
Eno

Enable output

? v ?
Out

Shift out component

?

v

Occupy Num continuous component

[Instruction function and effect declare]

1. WSHL instruction use start from Sou N components left shift Num word, shift start from In Num components ,shift out start from Out Num components.As follows:

2. 1?Num?N, no then instruction not execute.

3. WSHL instruction general executed by edge.

[Instruction example]

[Program description]

When M0=ON,V1000~V1005 left shift 3 word ,shift in V0~V2,shift out to V100~V102.

Sou component

Initial value

Left shift result

V1000

30

V1000=100

V1001

-150

V1001=200

V1002

25

V1002=300

V1003

8

V1003=30

V1004

95

V1004=-150

V1005

-20

V1005=25

V0

100

?

V1

200

?

V2

300

?

V100

?

V100=8

V101

?

V101=95

V102

?

V102=-20

WSHR(Word right shift)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

WSHR En, In, Sou, N, Num, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Word shift start component

v

Occupy Num continuous component

Sou

Source start component

v

?

Occupy N continuous component

N

Number of component

v

? 1~256
Num

Shift times

v

? ?
Eno

Enable output

?

v ?
Out

Shift out component

?

v

Occupy Num continuous component

[Instruction function and effect declare]

1. WSHR instruction use start from Sou N components right shift Num word, shift start from In Num components ,shift out start from Out Num components.As follows:

2. 1?Num?N, no then instruction not execute.

3. WSHR instruction general executed by edge.

[Instruction example]

[Program description]

When M0=ON,V1000~V1005 right 3 word, shift in V0~V2, shift out to V100~V102.

Sou component

Initial value

Right shift result

V1000

30

V1000=8

V1001

-150

V1001=95

V1002

25

V1002=-20

V1003

8

V1003=100

V1004

95

V1004=200

V1005

-20

V1005=300

V0

100

?

V1

200

?

V2

300

?

V100

?

V100=30

V101

?

V101=-150

V102

?

V102=25

ROL(Bit rotate left shift)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

ROL En, Sou, N, Num, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

?

Occupy N continuous component

N

Number of component

v

? 1~256
Num

Shift times

v

? ?
Eno

Enable output

?

v ?
Out

Shift out component

?

v

Occupy Num continuous component

[Instruction function and effect declare]

1. According to Num a group ,ROL instruction use start from Sou N components left shift Num bit, shift start from Sou Num components ,shift out start from Out Num components.As follows:

2. If Sou are register component, then use start from Sou N registers left shift bitwise .

3. 1?Num?N, no then instruction not execute .

4. ROL instruction general executed by edge.

[Instruction example]

[Program description]

1. When M0=ON, M100~M105 rotate left shift 3 bits, shift out to Y0~Y2.

Sou component

Initial value

Left shift result

M100

ON

M100=ON

M101

OFF

M101=ON

M102

ON

M102=OFF

M103

ON

M103=ON

M104

ON

M104=OFF

M105

OFF

M105=ON

Y0

?

Y0=ON

Y1

?

Y1=ON

Y2

?

Y2=OFF

2. When M1=ON, V1000~V1005 rotate left shift 3 bits, shift out to M200~M202.

Sou component

Initial value

Left shift result

V1000

00000000 00011110

V1000=00000000 11110111

V1001

11111111 01101010

V1001=11111011 01010000

V1002

00000000 00011001

V1002=00000000 11001111

V1003

00000000 00001000

V1003=00000000 01000000

V1004

00000000 01011111

V1004=00000010 11111000

V1005

11111111 11101100

V1005=11111111 01100000

M200

?

M200=ON

M201

?

M201=ON

M202

?

M202=ON

ROR(Bit rotate right shift)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

ROR En, Sou, N, Num, Out

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?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

?

Occupy N continuous component

N

Number of component

v

? 1~256
Num

Shift times

v

? ?
Eno

Enable output

?

v ?
Out

Shift out component

?

v

Occupy Num continuous component

[Instruction function and effect declare]

1. According to Num a group ,ROR instruction use start from Sou N components right shift Num bit, shift start from Sou Num components ,shift out start from Out Num components.As follows:

2. If Sou are register component, then use start from Sou N registers right shift bitwise .

3. 1?Num?N, no then instruction not execute.

4. ROR instruction general executed by edge.

[Instruction example]

[Program description]

1. When M0=ON, M100~M105 rotate right shift 3 bits , shift out to Y0~Y2.

Sou component

Initial value

Right shift result

M100

ON

M100=ON

M101

OFF

M101=ON

M102

OFF

M102=OFF

M103

ON

M103=ON

M104

ON

M104=OFF

M105

OFF

M105=OFF

Y0

?

Y0=ON

Y1

?

Y1=OFF

Y2

?

Y2=OFF

2. When M1=ON, V1000~V1005 rotate right shift 3 bits, shift out to M200~M202.

Sou component

Initial value

Right shift result

V1000

00000000 00011110

V1000=01000000 00000011

V1001

11111111 01101010

V1001=00111111 11101101

V1002

00000000 00011001

V1002=00000000 00000011

V1003

00000000 00001000

V1003=11100000 00000001

V1004

00000000 01011111

V1004=10000000 00001011

V1005

11111111 11101100

V1005=11011111 11111101

M200

?

M200=OFF

M201

?

M201=ON

M202

?

M202=ON

WROL(Word rotate left shift)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

WROL En, Sou, N, Num, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

?

Occupy N continuous component

N

Number of component

v

? 1~256
Num

Shift times

v

? ?
Eno

Enable output

?

v ?
Out

Shift out component

?

v

Occupy Num continuous component

[Instruction function and effect declare]

1. WROL instruction use start from Sou N components left shift Num word, shift start from Sou Num components ,shift out start from Out Num components.As follows:

2. 1?Num?N, no then instruction not execute .

3. WROL instruction general executed by edge.

[Instruction example]

[Program description]

When M0=ON,V1000~V1005 rotate left shift 3 words, shift out to V100~V102.

Sou component

Initial value

Left shift result

V1000

30

V1000=8

V1001

-150

V1001=95

V1002

25

V1002=-20

V1003

8

V1003=30

V1004

95

V1004=-150

V1005

-20

V1005=25

V100

?

V100=8

V101

?

V101=95

V102

?

V102=-20

WROR(Word rotate right shift)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

WROR En, Sou, N, Num, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

?

Occupy N continuous component

N

Number of component

v

? 1~256
Num

Shift times

v

? ?
Eno

Enable output

?

v ?
Out

Shift out component

?

v

Occupy Num continuous component

[Instruction function and effect declare]

1. WROR instruction use start from Sou N components right shift Num word, shift start from Sou Num components ,shift out start from Out Num components.As follows:

2. 1?Num?N, no then instruction not execute.

3. WROR instruction general executed by edge.

[Instruction example]

[Program description]

When M0=ON,V1000~V1005 rotate right shift 3 words, shift out to V100~V102.

Sou component

Initial value

Right shift result

V1000

30

V1000=8

V1001

-150

V1001=95

V1002

25

V1002=-20

V1003

8

V1003=30

V1004

95

V1004=-150

V1005

-20

V1005=25

V100

?

V100=30

V101

?

V101=-150

V102

?

V102=25

BSHL(Byte left shift)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

BSHL En, In, Sou, N, Num, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Shift in byte start component

v

Occupy (Num-1)\2+1 continuous component

Sou

Source start component

v

?

Occupy N continuous component

N

Number of component

v

? 1~256
Num

Shift times

v

? ?
Eno

Enable output

?

v ?
Out

Shift out component

?

v

Occupy (Num-1)\2+1 continuous component

[Instruction function and effect declare]

1. BSHL instruction use start from Sou N components left shift Num byte, shift in start from In Num bytes, shift out to start from Out Num bytes.As follows:

2. 1?Num?2*N, no then instruction not execute.

3. BSHL instruction general executed by edge.

[Instruction example]

[Program description]

When M0=ON,V1000~V1005 left shift 3 bytes, shift in V0 and V1 low byte, shift out to V100 and V101 low byte .

Sou component

Initial value

Left shift result

V1000

30(0x001E)

V1000=100(0x1234)

V1001

-150(0xFF6A)

V1001=200(0x1E78)

V1002

25 (0x0019)

V1002=300 (0x6A00)

V1003

8(0x0008)

V1003=30(0x19FF)

V1004

95 (0x005F)

V1004=-150(0x0800)

V1005

-20(0xFFEC)

V1005=25(0x5F00)

V0

4660 (0x1234)

?

V1

22136 (0x5678)

?

V100

?

V100=8(0xEC00)

V101

?

V101=95(0x00FF)

BSHR(Byte right shift)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

BSHR En, In, Sou, N, Num, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Shift in byte start component

v

Occupy (Num-1)\2+1 continuous component

Sou

Source start component

v

?

Occupy N continuous component

N

Number of component

v

? 1~256
Num

Shift times

v

? ?
Eno

Enable output

?

v ?
Out

Shift out component

?

v

Occupy (Num-1)\2+1 continuous component

[Instruction function and effect declare]

1. BSHR instruction use start from Sou N components right shift Num byte, shift in start from In Num bytes, shift out to start from Out Num bytes.As follows:

2. 1?Num?2*N, no then instruction not execute.

3. BSHR instruction general executed by edge.

[Instruction example]

[Program description]

When M0=ON,V1000~V1005 right shift 3 bytes, shift in V0 and V1 low byte, shift out to V100 and V101 low byte.

Sou component

Initial value

Right shift result

V1000

30(0x001E)

V1000=100(0x19FF)

V1001

-150(0xFF6A)

V1001=200(0x0800)

V1002

25 (0x0019)

V1002=300 (0x5F00)

V1003

8(0x0008)

V1003=30(0xEC00)

V1004

95 (0x005F)

V1004=-150(0x34FF)

V1005

-20(0xFFEC)

V1005=25(0x7812)

V0

4660 (0x1234)

?

V1

22136 (0x5678)

?

V100

?

V100=8(0x001E)

V101

?

V101=95(0x006A)

ATBL(Append to array)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

ATBL En, In, Tbl, N

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?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In

Input data

v

? ?
Tbl

Array start component

v

?

Occupy N+1 continuous component

N

Array length

v

? 1~256
Eno

Enable output

?

v ?

[Instruction function and effect declare]

1. Append to array instruction ATBL will append bit state or register value to the array specified by Tbl in sequence.

2. En is instruction Enable item, general use edge type (rising edge or failling edge) signal.When En state hop ON once , append In value to array specified by Tbl, array element number add 1(Tbl register content value add 1).

3. Tbl define store data array start component ,N is array length , among the first register (Tbl)of the array be the numbers of the array element ,Tbl+1 to Tbl+N total N registers use for store array data.so, if In is bit component ,the maximum array element can be stored are N*16; If In is regieter ,the maximum array element can be stored are N. When number of array element exceed the maximum value of array elements , data con not append into the array .

4. Store queue of the array as follows :

A. Bit component data: if append to array is bit, store queue of the array as follows:

Array component

Array content

Tbl

Number of array element

Tbl+1

b0

First array element

b1

Second array element

...... ?
b15

Sixteen array element

Tbl+2

b0

seventeen array element

b1

eighteen array element

......

......

......

b0

......

......

......

B. Register component data: if appended to array is 16 bit register, store queue of the array as follows:

Array component

Array content

Tbl

Number of array element

Tbl+1

First array element

Tbl+2

Second array element

Tbl+3

Third array element

......

......

[Instruction example]

[Program description]

1. First scan SM2=ON, start T0 timer(30s).

2. SM5 is clock pulse per second , cycles per second, INC instruction V200 add 1(for simulated data),ATBL instruction append V200 into the array start from V500 , array length is 255.

3. After 30s ,T0=OFF, per second FIFO instruction will be first in first out get data from array, output to AQ0.

FIFO(First in first out)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FIFO En, Tbl, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Tbl

Array start component

v

? ?
Eno

Enable output

?

v ?
Out

Data output

?

v ?

[Instruction function and effect declare]

1. FIFO instruction according to first in first out model get out data from array ATBL , each data be get out array element subtract 1.

2. If number of array elements?0, then instruction not execute.

3. FIFO instruction cooperate ATBL instruction ready-made first in first out array,FIFO instruction general executed by edge.

[Instruction example]

Refer to ATBL instruction.

LIFO(Last in first out)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

LIFO En, Tbl, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Tbl

Array start component

v

? ?
Eno

Enable output

?

v ?
Out

Data output

?

v ?

[Instruction function and effect declare]

1. LIFO instruction according to last in first out model get out data from array ATBL , each data be get out array element subtract 1.

2. If number of array elements?0, then instruction not execute.

3. LIFO instruction cooperate ATBL instruction ready-made last in first out array(stack),LIFO instruction general executed by edge.

[Instruction example]

[Program description]

1. First scan SM2=ON, start T0 timer(30s).

2. SM5 clock pulse per second , cycles per second, INC instruction V200 add 1(for simulated data), ATBL instruction append V200 into the array start from V500 , array length is 255.

3. After 30s,T0=OFF, per second LIFO instruction get out data from array according to last in first out ,output to AQ0.

SORT(Data sort)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

SORT En, UpDown, Sou, Row, Col, Index, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
UpDown

Ascending or descending order control

v

? ?
Sou

Source start component

v

?

Occupy Row * Col continuous component

Row

Row

v

1~64
Col

Line

v

? 1~64
Index

Arrange sequence

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v

Occupy Row * Col continuous component

[Instruction function and effect declare]

1. The data from start Sou Row row Col line total Row?Col elements will be sorted ,sort refer to Index specified line ,sort direction controlled by UpDown, UpDown is OFF then ascending sort , UpDown is ON then descending sort, data be sorted store into the first Out total Row?Col elements.

2. SORT instruction be executed edge ,if modified the Sou data after sorted, then must be retrigger.

3. Must meet Row?1. Col?1. Index?Col, no then instruction not execute.

[Instruction example]

[Program description]

If initial data (performance) as follows:

Name

Chinese

Math

English

Wu

V1000=98 V1001=65 V1002=81

Chen

V1003=78 V1004=89 V1005=65

Wang

V1006=87 V1007=99 V1008=68

Li

V1009=60 V1010=92 V1011=83

Zhang

V1012=72 V1013=90 V1014=56

If M100=OFF, when M0=ON, start from V1000 5 row 3 line array ,according to line 2(mathematic performance) use ascending sort , result store into start from V0 5x3 elements.

Name

Chinese

Math

English

Wu

V0=98 V1=65 V2=81

Chen

V3=78 V4=89 V5=65

Zhang

V12=72 V13=90 V14=56

Li

V9=60 V10=92 V11=83

Wang

V6=87 V7=99 V8=68

If M100=ON, when M0=ON,start from V1000 5 row 3 line array ,according to line 2(mathematic performance) use descending sort , result store into start from V0 5x3 elements.

Name

Chinese

Math

English

Wang

V6=87 V7=99 V8=68

Li

V9=60 V10=92 V11=83

Zhang

V12=72 V13=90 V14=56

Chen

V3=78 V4=89 V5=65

Wu

V0=98 V1=65 V2=81

Data conversion instruction


Data conversion instruction list as follows

Instruction name 8 bit model 32 bit model Instruction function Support language
LD FBD IL
ENCO

?

?

Encoder

v

v

v

DECO

?

?

Decoder

v

v

v

BTOW

?

?

Bit convert to word

v

v

v

WTOB

?

?

Word convert to bit

v

v

v

HEX

HEX.LB

ASCII convert to hexadecimal

v

v

v

ASCI

ASCI.LB

Hexadecimal convert to ASCII

v

v

v

BUNB ?

Discrete bit combination to continuous bit

v

v

v

BUNW ?

Discrete bit combination to continuous word

v

v

v

WUNW ?

Discrete word combination to continuous word

v

v

v

BDIB ?

Continuous bit disperse to discrete bit

v

v

v

WDIB ?

Continuous word disperse to discrete bit

v

v

v

WDIW ?

Continuous word disperse to discrete word

v

v

v

BCD ?

D.BCD

BIN convert to BCD

v

v

v

BIN ?

D.BIN

BCD convert to BIN

v

v

v

ITOL

?

?

Integer convert to long integer

v

v

v

GRAY

?

?

BIN convert to GRAY code

v

v

v

GBIN

?

?

GRAY code convert to BIN

v

v

v

ENCO(Encoder)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

ENCO En, Sou, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

? ?
N

Number of bits be encoded

v

? 0~8
Eno

Enable output

?

v ?
Out

Encode output

?

v ?

[Instruction function and effect declare]

1. ENCO instruction use for obtain the position of the maximum ON bit in Sou data .

2. 0?N?8,maximum may encode 2^8=256 bits.

3. If the source data have many bits are 1(ON), then only deal with the highest bit.

[Instruction example]

[Program description]

1. M0=ON,X0~X7(2^3=8) proceed encode, if X6=ON,X7=OFF other not to matter, then V0=7.

2. M0=ON,V100 low 8 bits (2^3=8,high 8 bits not use ) proceed encode ,if V100=2345(00001001 00101001),then V10=6.

DECO(Decoder)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

DECO En, In, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In

Decode input

v

? ?
N

Decode digitals

v

? 0~8
Eno

Enable output

?

v ?
Out

Decode output

?

v ?

[Instruction function and effect declare]

1. DECO instruction decode N digitals of the In data, result output to Out.

2. 0?N?8,maximum may decode output 2^8=256 bits.

[Instruction example]

[Program description]

M0=ON,V0 decoded Output to Y0~Y7(2^3=8) and low 8 bits of V100 (2^3=8,high 8 bits total are 0). If V0=7, then among Y0~Y7 only Y6=ON others OFF,V100=64(00000000 01000000).

BTOW(Bit convert to word)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

BTOW En, Sou, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

?

Occupy N continuous component

N

Convert digitals

v

? 1~256
Eno

Enable output

?

v

?

Out

Output

?

v ?

[Instruction function and effect declare]

BTOW instruction convert N bit components start from Sou, convert to integer result output toOut.

[Instruction example]

[Program description]

When M0=ON,X0~X5 convert to integer ,if X1=ON. X2=ON. X5=ON others are OFF,then V0=38(00000000 00100110).

WTOB (Word convert to bit)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

WTOB En, In, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In

Input

v

? ?
N

Convert digitals

v

? 1~256
Eno

Enable output

?

v ?
Out

Convert result start component

?

v

Occupy N continuous component

[Instruction function and effect declare]

WTOB instruction convert N bits of In to output to Out.

[Instruction example]

[Program description]

When M0=ON,low 7 bits of V0 convert to Y0~Y6,if V0=38(00000000 00100110),then Y1=ON. Y2=ON. Y5=ON others are OFF.

HEX. HEX.LB(ASCII convert to hexadecimal)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 8 bit

Instruction format

HEX En, Sou, N, Out

HEX.LB En, Sou, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

?

HEX occupy (N-1)\2+1 continuous component,HEX.LB occupy N continuous component

N

Number of characters converted

v

?

1~256

Eno

Enable output

?

v

?

Out

Output

?

v

Occupy (N-1)\4+1 continuous component

[Instruction function and effect declare]

1. HEX instruction convert start from Sou ASCII code to HEX value, number of N characters will be onverted.

2. 8 bit model instruction HEX.LB only convert low byte of Sou , high byte not use .

3. ASCII code characters only be 0~9 and A. B. C. D. E. F these 6 characters, if there have illegality characters in Sou then instruction not execute.

[Instruction example]

[Program description]

If initial data (ASCII code data) as follows:

Component

Register value (ASCII code)

High low byte value(ASCII code)

ASCII character

V1000

0x3938 Low byte 0x38 "8"
Hight byte 0x39 "9"

V1001

0x4241 Low byte 0x41 "A"
Hight byte 0x42 "B"

V1002

0x3534 Low byte 0x34 "4"
Hight byte 0x35 "5"

V1003

0x3332 Low byte 0x32 "2"
Hight byte 0x33 "3"

V1004

0x4645 Low byte 0x45 "E"
Hight byte 0x46 "F"

V1005

0x3039 Low byte 0x39 "9"
Hight byte 0x30 "0"

V1006

0x3831 Low byte 0x31 "1"
Hight byte 0x38 "8"

V1007

0x4443 Low byte 0x43 "C"
Hight byte 0x44 "D"

When M0=ON, start from V1000 ASCII code convert to data ,HEX convert result to components start form V0 ,HEX.LB only convert to low byte ASCII code of V1000 , convert result to start from V10, N=1~8 converted result as follows.

N

HEX

HEX.LB

V1

V0

V11

V10

1

? 0x8 ? 0x8

2

0x89 0x8A

3

0x89A 0x8A4

4

0x89AB 0x8A42

5

0x8 0x9AB4 0x8 0xA42E

6

0x89 0xAB45 0x8A 0x42E9

7

0x89A 0xB452 0x8A4 0x2E91

8

0x89AB 0x4523 0x8A42 0xE91C

ASCI. ASCI.LB(Hexadecimal convert to ASCII)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 8 bit

Instruction format

ASCI En, Sou, N, Out

ASCI.LB En, Sou, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

?

Occupy (N-1)\4+1 continuous component

N

number of character be converted

v

?

1~256

Eno

Enable output

?

v

?

Out

Output

?

v

ASCI occupy (N-1)\2+1 continuous component,ASCI.LB occupy N continuous component

[Instruction function and effect declare]

1. ASCI instruction convert start from Sou value to ASCII code character , number of N characters will be converted, convert result stored to start from Out component .

2. 8 bit model instruction ASCI.LB only store convert low byte to low byte of Out ,hight byte is 0.

[Instruction example]

[Program description]

If initial data ( convert to ASCII code)as follows:

component

Register value

V1100

0x4523

V1101

0x89AB

When M1=ON,ASCI instruction convert the value of start from V1100 to ASCII code, result to start from V100 component,ASCI.LB instruction put the result to start from V2000 components (Only low byte, hight byte is0),N=1~8 convert ed result as follows .

Instruction format

Out component

N

1

2

3

4

5

6

7

8

ASCI

V100

Low byte

"3" "2" "5" "4" "B" "A" "9" "8"

Hight byte

? "3" "2" "5" "4" "B" "A" "9"

V101

Low byte

? ? "3" "2" "5" "4" "B" "A"

Hight byte

? ? ? "3" "2" "5" "4" "B"

V102

Low byte

? ? ? ? "3" "2" "5" "4"

Hight byte

? ? ? ? ? "3" "2" "5"

V103

Low byte

? ? ? ? ? ? "3" "2"

Hight byte

? ? ? ? ? ? ? "3"

ASCI.LB

V200

Low byte

"3" "2" "5" "4" "B" "A" "9" "8"

V201

Low byte

? "3" "2" "5" "4" "B" "A" "9"

V202

Low byte

? "3" "2" "5" "4" "B" "A"

V203

Low byte

? "3" "2" "5" "4" "B"

V204

Low byte

? "3" "2" "5" "4"

V205

Low byte

? "3" "2" "5"

V206

Low byte

? "3" "2"

V207

Low byte

? "3"

BUNB(Discrete bit combination to continuous bit)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

BUNB En, Table, Des

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Table

Discrete bit table

v

? ?
Eno

Enable output

?

v

?

Des

Target start component

?

v

?

[Instruction function and effect declare]

BUNB instruction use for combination the discrete bit which Table define to continuous bit components .

Discrete bit table: may be called by BUNB. BUNW. BDIB. WDIB instruction Table item. how to define the discrete bit table please refer to " instruction use table" section.

[Instruction example]

[Program description]

If "read discrete bit table" defined as follows:

Sequence number

Bit component

1

X3

2

M10

3

M301

4

S21

5

M77

6

M100

7

X1

8

Y6

When M0=ON,BUNB instruction combine the "read discrete bit table" defined bit to start from M500 continuous component.

Sequence number

Executed result

1

M500 = X3

2

M501 = M10

3

M502 = M301

4

M503 = S21

5

M504 = M77

6

M505 = M100

7

M506 = X1

8

M507 = Y6

BUNW(Discrete bit combination to continuous word)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

BUNW En, Table, Des

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Table

Discrete bit table

v

? ?
Eno

Enable output

?

v ?
Des

Target start component

?

v ?

[Instruction function and effect declare]

BUNW instruction use for combination the discrete bit which Table define to continuous word components.

Discrete bit table:May be called by BUNB. BUNW. BDIB. WDIB instruction Table item. How to define the discrete bit table please refer to " instruction use table" section.

[Instruction example]

[Program description]

If "read discrete bit table" defineas follows:

Sequence number

bit component

1

X3

2

M10

3

M301

4

S21

5

M77

6

M100

7

X1

8

Y6

When M1=ON,BUNW instruction combination bitwise "read discrete bit table" defined bit to start from V0 registers.

Sequence number

Executed result

1

V0?b0 = X3

2

V0?b1 = M10

3

V0?b2 = M301

4

V0?b3 = S21

5

V0?b4 = M77

6

V0?b5 = M100

7

V0?b6 = X1

8

V0?b7 = Y6

WUNW(Discrete word combination to continuous word)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

WUNW En, Table, Des

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Table

Discrete register component table

v

? ?
Eno

Enable output

?

v ?
Des

Target start component

?

v ?

[Instruction function and effect declare]

WUNW instruction use for combination the discrete register which Table define to continuous register components .

Discrete register component table:May be called by WUNW. WDIW instruction Table item. How to define discrete register component table please refer to " instruction use table " section.

[Instruction example]

[Program description]

If "read discrete register table " defineas follows:

Sequence number

bit component

1

AI1

2

V10

3

V106

4

AQ0

When M0=ON, WUNW instruction combination move the "read discrete register table " defined register to start from V200 continuous component.

Sequence number

Executed result

1

V200 = AI1

2

V201 = V10

3

V202 = V106

4

V203 = AQ0

BDIB(Continuous bit disperse to discrete bit)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

BDIB En, Sou, Table

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

? ?
Table

Discrete bit component table

v

? ?
Eno

Enable output

?

v ?

[Instruction function and effect declare]

BDIB instruction use for disperse the bit components start from Sou to discrete bit components defined by Table.

Discrete bit table: may be called by BUNB. BUNW. BDIB. WDIB instruction Table item. How to define the discrete bit table please refer to " instruction use table" section.

[Instruction example]

[Program description]

If "write discrete bit table " define as follows:

Sequence number

Bit component

1

Y4

2

M10

3

M301

4

S21

5

M77

6

M100

7

Y0

8

Y6

When M0=ON,BDIB instruction combination move the start from M500 continuous bit to "write discrete bit table " .

Sequence number

Executed result

1

Y4 = M500

2

M10 = M501

3

M301 = M502

4

S21= M503

5

M77= M504

6

M100 = M505

7

Y0 = M506

8

Y6 = M507

WDIB(Continuous word disperse to discrete bit)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

WDIB En, Sou, Table

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

? ?
Table

Discrete bit component table

v

? ?
Eno

Enable output

?

v ?

[Instruction function and effect declare]

WDIB instruction use for disperse the bit components start bitwise from Sou register to discrete bit components defined by Table.

Discrete bit table: may be called by BUNB. BUNW. BDIB. WDIB instruction Table item. How to define the discrete bit table please refer to " instruction use table" section.

[Instruction example]

[Program description]

If "write discrete bit table " define as follows:

Sequence number

Bit component

1

Y4

2

M10

3

M301

4

S21

5

M77

6

M100

7

Y0

8

Y6

When M1=ON, WDIB instruction discrete bitwise the start from V0 register to "write discrete bit table" defined bit components .

Sequence number

Executed result

1

Y4 = V0?b0

2

M10 = V0?b1

3

M301 = V0?b2

4

S21= V0?b3

5

M77= V0?b4

6

M100 = V0?b5

7

Y0 = V0?b6

8

Y6 = V0?b7

WDIW(Continuous word disperse to discrete word)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

WDIW En, Sou, Table

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

? ?
Table

Discrete register component table

v

? ?
Eno

Enable output

?

v ?

[Instruction function and effect declare]

WDIW instruction use for disperse the registers start from Sou register to discrete registers defined by Table.

Discrete register component table: may be called by WUNW. WDIW instruction Table item. How to defined discrete register component table please refer to " instruction use table" section.

[Instruction example]

[Program description]

If " write discrete register table" define as follows:

Sequence number

Bit component

1

V90

2

V10

3

V106

4

AQ0

When M0=ON, WDIW instruction discrete the register start from V200 to "read discrete register table " defined discrete register.

Sequence number

Executed result

1

V90 = V200

2

V10 = V201

3

V106 = V202

4

AQ0 = V203

BCD. D.BCD(BIN convert to BCD)

Instruction format and parameter specification

Language LD FBD IL Program example

16,32 bit

Instruction format

BCD En, In, Out

D.BCD En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

1. BCD instruction (D.BCD is 32 bit instruction) use for convert the value to BCD code.

2. 16 bit instruction value input range is 0~9999,32 bit instruction value input range is 0~99999999,In exceed range then instruction not execute.

[Instruction example]

[Program description]

When M0=ON,BCD instruction convert V1000 value to BCD code result to V0,D.BCD instruction convert V1001V1002 value to result to V10V11,as follows table.

In component

Initial value

BCD convert result

D.BCD convert result

V1000

2345 V0 = 0x2345 ?

V1001V1002

48702861 ? V10V11 = 0x48702861

BIN. D.BIN(BCD convert to BIN)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

BIN En, In, Out

D.BIN En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

1. BIN instruction (D.BIN is 32 bit instruction) use for convert BCD code to value.

2. BCD code (Binary-coded Decimal?) also name binary code decimal numbers. binary-decimal code or 8421 code, that is expand the decimal number to binary number according to 8421 model .BCD code is four digit binary code, that is convert decimal number to binary number , but different from the general convert , each decimal number 0-9 corresponding a four digit binary code,corresponding relation as follows: decimal 0 corresponding 0000; decimal 1 corresponding 0001 ....... decimal 9 corresponding 1001, following 10 express in above-mentioned 2 code, decimal 10 express is 00010000, that is BCD code come across 1001 generate carry bit , unlike general binary code reach 1111 general carry bit 10000.

3. If In input contain not BCD code (contain 0xA. 0xB. 0xC. 0xD. 0xE. 0xF) then instruction not execute.

[Instruction example]

[Program description]

When M1=ON,BIN instruction convert the BCD code of V1100 to value result to V20,D.BIN instruction convert the BCD code of V1101V1102 to value result to V30V31,as follows table .

In component

Initial value

BIN convert result

D.BIN convert result

V1100

0x3938 V20 = 3938 ?

V1101V1102

0x35344241 ? V30V31 = 35344241

ITOL(Integer convert to long integer)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

ITOL En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v Occupy 2 continuous component

[Instruction function and effect declare]

ITOL instruction use for convert 16 bit integer to 32 bit long integer .

[Instruction example]

[Program description]

When M0=ON,ITOL instruction convert V1000 to long integer result to V0V1, convert V1001 to long integer result to V2V3,as follows table .

In component

Initial value

convert result

V1000

4648 V0V1 = 4648

V1001

-16961 V2V3 = -16961

GRAY(BIN convert to GRAY code)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

GRAY En, In, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In

Input

v

?

In is bit component occupy N continuous component, is register component occupy (N-1)\16+1 continuous component

N

GRAY code length

v

?

1-32

Eno

Enable output

?

v ?
Out

Output

?

v Out is bit component occupy N continuous component, is register component occupy (N-1)\16+1 continuous component

[Instruction function and effect declare]

1. GRAY instruction use for convert value to gray code.

2. In must >0 then instruction not execute.

[Instruction example]

[Program description]

When M0=ON, convert the low 7 bits of V0 to gray code output to Y0~Y6,convert M10~M16 to gray code output to V10.

In component

Value

Convert to gray code result

V0

25

Y0=ON

Y1=OFF

Y2=ON

Y3=OFF

Y4=ON

Y5=OFF

Y6=OFF

M10

ON

V10=21

M11

OFF

M12

OFF

M13

ON

M14

ON

M15

OFF

M16

OFF

GBIN(GRAY code convert to BIN)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

GBIN En, In, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In

Input

v

?

In is bit component occupy N continuous component, is register component occupy (N-1)\16+1 continuous component

N

GRAY code length

v

?

1-32

Eno

Enable output

?

v

?

Out

Output

?

v

Out is bit component occupy N continuous component, is register component occupy (N-1)\16+1 continuous component

[Instruction function and effect declare]

1. GBIN instruction use for convert gray code to value.

2. In must >0 then instruction not execute.

[Instruction example]

[Program description]

When M1=ON, convert Y0~Y6 gray code to value output to V20, convert the gray code of the low 7 bits of V10 to value output to M100~M106.

In component

Value

Gray code convert to value

Y0

ON

V20=25

Y1

OFF

Y2

ON

Y3

OFF

Y4

ON

Y5

OFF

Y6

OFF

V10

21

M100=ON

M101=OFF

M102=OFF

M103=ON

M104=ON

M105=OFF

M106=OFF

Character instruction


Character instruction list as follows

Instruction name 8 bit model 32 bit model Instruction function Support language
LD FBD IL
GHLB ? ? Obtain high low byte

v

v

v

GETB ? ? Capture byte string

v

v

v

BCMP BCMP.LB ? Byte string comparison

v

v

v

ITOC ?

D.ITOC

Integer convert to character

v

v

v

CTOI

?

?

Character convert to integer

v

v

v

FTOC

?

?

Floating point convert to character

v

v

v

CTOF

?

?

Character convert to floating point

v

v

v

GHLB(Obtain high low byte)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

GHLB En, Sou, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

?

Occupy N continuous component

N

Number of component

v

? 1~256
Eno

Enable output

?

v ?
Out

Output

?

v

Occupy 2N continuous component

[Instruction function and effect declare]

GHLB instruction separate the high low byte of start from Sou N registers low byte output to Out.

[Instruction example]

[Program description]

When M0=ON, separate high low byte of V1000~V1004 output to V0~V9.

Sou component

Value

Output component

Output result

V1000

0x001E

V0

0x1E

V1

0x00

V1001

0xFF6A

V2

0x6A

V3

0xFF

V1002

0x0E19

V4

0x19

V5

0x0E

V1003

0x1208

V6

0x08

V7

0x12

V1004

0x0D5F

V8

0x5F

V9

0x0D

GETB(Capture byte string)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

GETB En, Sou, Start, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Sou

Source start component

v

Occupy (Start+N)\2 continuous component

Start

The start byte sequence number

v

? ?
N

Number of bytes

v

? 1~256
Eno

Enable output

?

v ?
Out

Output

?

v

Occupy (N+1)\2 continuous component

[Instruction function and effect declare]

GETB instruction capture N bytes from start byte of the byte string start from Sou.

[Instruction example]

[Program description]

When M0=ON, capture 7 bytes from second byte of the byte string start from V1000 ,output to V0~V3.

Sou component

Value

Output component

Output result

V1000

0x011E

V0

0x6A01

V1001

0xFF6A

V1

0x19FF

V1002

0x0E19

V2

0x080E

V1003

0x1208

V3

0x0012

V1004

0x0D5F

? ?

BCMP. BCMP.LB(Byte string comparison)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 8 bit

Instruction format

BCMP En, In1, In2, N, Out

BCMP.LB En, In1, In2, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In1

Compare byte string 1

v

?

BCMP occupy (N+1)\2 continuous component, BCMP.LB occupy N continuous component

In2

Compare byte string 2

v

?

BCMP occupy (N+1)\2 continuous component, BCMP.LB occupy N continuous component

N

Compare number of bytes

v

? 1~256
Out

Compare result output

?

v ?

[Instruction function and effect declare]

BCMP instruction compare the byte string of In1 and In2,compare n bytes, if equal to then Out=ON, no then Out=OFF. BCMP.LB is low byte model, only compare low byte part.

[Instruction example]

[Program description]

When M0=ON, compare byte string V1000~V1004 and byte string V1010~V1014 ,BCMP instruction compare 7 bytes,BCMP.LB instruction compare 5 low byte.

In1 component

Initial value

In2 component

Initial value

Compare result

V1000

0x011E

V1010

0x011E

M100=OFF

?

M101=ON

V1001

0xFF6A

V1011

0x026A

V1002

0x0E19

V1012

0x0019

V1003

0x1208

V1013

0x1208

V1004

0x0D5F

V1014

0x5D5F

ITOC. D.ITOC(Integer convert to character)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

ITOC En, In, Out

D.ITOC En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v

Occupy 6 continuous component

[Instruction function and effect declare]

ITOC instruction use for integer convert to character ,D.ITOC use for long integer convert to character. Output automatic occupy 6 continuous register , total can express12 characters, if convert result not enough 12 characters then the behind register filled by the blank space.

[Instruction example]

[Program description]

When M0=ON, ITOC convert V1000 integer to character output to V0~V5,D.ITOC convert V1001V1002 long integer to character output to V10~V15,as follows table .

In component

Initial value

convert result

V1000

286 V0~V5 ="286"

V1001V1002

-2584810 V10~V15 =" -2584810"

CTOI(Character convert to integer)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

CTOI En, Sou, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?

Sou

Source start component

v

?

Occupy 6 continuous component

N

Convert character number

v

?

N range :1~11

Eno

Enable output

?

v ?
Out

Output

?

v

Occupy 2 continuous component

[Instruction function and effect declare]

1. CTOI use for convert N character start Sou to long integer , if convert result exceed long integer range then not convert moreover Eno is 0(OFF),Out maintain original not changed .

2. N is will be converted character number, valid range 1~11,if exceed range then not convert moreover Eno=OFF, Out maintain original not changed .

3. If will be converted character contain illegal character( except 0 ~ 9. +. - character), replace space to ahead , lop back .For example: character '123'. '123dfg'. 'A123' convert result all re integer 123.

[Instruction example]

[Program description]

When M0=ON, CTOI convert character 7 characters of V1000~V1005 to integer output to V0V1, convert 9 characters of V1010~V1015 to integer output to V2V3,as follows table .

In component

Initial value

convert result

V1000~V1005

"1234567890" V0V1 =1234567

V1010~V1015

"-987654321" V2V3 =-98765432

FTOC(Floating point convert to character)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FTOC En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

?

Occupy 2 continuous component

Eno

Enable output

?

v ?
Out

Output

?

v

Occupy 6 continuous component

[Instruction function and effect declare]

FTOC instruction use for floating point convert to character.Output automatic occupy 6 continuous register ,total can express12 character, if convert result not enough 12 characters then the behind register filled by the blank space.

[Instruction example]

[Program description]

When M0=ON,FTOC use for convert floating point V1000V1001 to character output to V0~V5, convert floating point V1002V1003 to character output to V10~V15,as follows table .

In component

Initial value

convert result

V1000V1001

23.4567 V0~V5 ="23.4567"

V1002V1003

-2987.56 V10~V15 =" -2987.56"

CTOF(Character convert to floating point)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

CTOF En, Sou, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

?

Occupy 6 continuous component

N

Convert character number

v

?

N range :1~11

Eno

Enable output

?

v ?
Out

Output

?

v

Occupy 2 continuous component

[Instruction function and effect declare]

1. CTOF convert N characters start from Sou to floating point, if convert result exceed floating point range then not convert moreover Eno is 0(OFF),Out maintain original not changed .

2. N is number of character be converted, valid range 1~11, if exceed range then not convert moreover Eno=OFF,Out maintain original not changed .

3. If the character be converted contain illegal character( except 0 ~ 9. .. +. - character), eplace space to ahead , lop back .For example: character '1.23'. '1.23dfg'. 'A1.23' convert result all are floating point 1.23.

[Instruction example]

[Program description]

When M0=ON,CTOF convert 7 characters of V1000~V1005 to floating point output to V0V1, convert 9 characters of V1010~V1015 to floating point output to V2V3,as follows table .

In component

Initial value

convert result

V1000~V1005

"1234.67890" V0V1 =1234.67

V1010~V1015

"-98.654321" V2V3 =-98.65432

Arithmetical instruction


Arithmetical operation instruction list as follows

Instruction name 8 bit model 32 bit model Instruction function Support language
LD FBD IL
WNOT

?

D.WNOT

Negation

v

v

v

WAND

?

D.WAND

AND operation

v

v

v

WOR

?

D.WOR

ORoperation

v

v

v

WXOR ?

D.WXOR

XORoperation

v

v

v

ADD ?

D.ADD

Addition

v

v

v

SUB ?

D.SUB

Subtraction

v

v

v

INC ?

D.INC

Increase 1

v

v

v

DEC ?

D.DEC

Decrease 1

v

v

v

MUL ?

D.MUL

Multiplication

v

v

v

DIV

?

D.DIV

Division

v

v

v

ACCU

?

D.ACCU

Accumulation

v

v

v

AVG

?

D.AVG

Average

v

v

v

ABS

?

D.ABS

Absolute value

v

v

v

NEG

?

D.NEG

Two's complement

v

v

v

WNOT. D.WNOT(Negation)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

WNOT En, In, Out

D.WNOT En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

WNOT instruction bitwise negation output.

[Instruction example]

[Program description]

When M0=ON, execute as follows logical operation,V0= not V1000;V2V3=V1000V1001 and V1002V1003;V4=V1000 or V1002;V6V7=V1000V1001 xor V1002V1003,as follows table .

component

Initial value

Arithmetic result

V1000

10100111 01010010 V0 =01011000 10101101

V1000V1001

01000001 10111011 10100111 01010010 V2V3 =01000001 00111010 1010000001010010

V1002

10111000 11110110 V4 =10111111 11110110

V1002V1003

11000101 00111010 10111000 11110110 V6V7 =10000100 10000001 00011111 10100100

WAND. D.WAND(AND operation)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

WAND En, In1, In2, Out

D.WAND En, In1, In2, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In1

Input1

v

? ?
In2

Input2

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

WAND instruction use for In1. In2 bitwise logical AND operation output.

[Instruction example]

Refer to WNOT instruction example.

WOR. D.WOR(OR operation)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

WOR En, In1, In2, Out

D.WOR En, In1, In2, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In1

Input1

v

? ?
In2

Input2

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

WOR instruction use for In1. In2 bitwise logical ORoperation output.

[Instruction example]

Refer to WNOT instruction example.

WXOR. D.WXOR(XOR operation)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

WXOR En, In1, In2, Out

D.WXOR En, In1, In2, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In1

Input1

v

? ?
In2

Input2

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

WXOR instruction use for In1. In2 bitwise logical XORoperation output.

[Instruction example]

Refer to WNOT instruction example.

ADD. D.ADD(Addition)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

ADD En, In1, In2, Out

D.ADD En, In1, In2, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In1

Augend

v

? ?
In2

Addend

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

ADD instruction use for In1 add In2 output to Out.

[Instruction example]

[Program description]

When M0=ON, execute as follows logical operation,V0= V1000+V1002;V2V3=V1000V1001-V1002V1003;V4V5=V1000* V1002;V8V9=V1000V1001\ V1002V1003,as follows table .

component

Initial value

Arithmetic result

V1000

2702 V0 =2516

V1000V1001

1102776974 V2V3 =1201277768

V1002

-186 V4V5 =-502572

V1002V1003

-98500794 Quotient V8V9 =-11,remainder V10V11=19268240

SUB. D.SUB(Subtraction)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

SUB En, In1, In2, Out

D.SUB En, In1, In2, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In1

Minuend

v

? ?
In2

Subtracter

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

SUB instruction use for In1 subtract In2 output to out.

[Instruction example]

Refer to ADD instruction example.

INC. D.INC(Increase 1)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

INC En, In

D.INC En, In

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Augend

v

? ?
Eno

Enable output

?

v ?

[Instruction function and effect declare]

1. INC instruction use for In increase 1 again store to In.

2. 16 bit instruction INC,if In=32767,Increase 1 change to -32768.

3. 32 bit instruction D.INC,if In=2147483647,Increase 1 change to -2147483648.

[Instruction example]

[Program description]

When X0=ON, then V0V1=V0V1+1

DEC. D.DEC(Decrease 1)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

DEC En, In

D.DEC En, In

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Minuend

v

? ?
Eno

Enable output

?

v ?

[Instruction function and effect declare]

1. DEC instruction use for In decrease 1 again store to In.

2. 16 bit instruction DEC if In=-32768,Increase 1 change to 32767.

3. 32 bit instruction D.DEC if In=-2147483648,Increase 1 change to 2147483647.

[Instruction example]

[Program description]

When X1=ON, then V2=V2-1

MUL. D.MUL(Multiplication)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

MUL En, In1, In2, Out

D.MUL En, In1, In2, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In1

Multiplicand

v

? ?
In2

Multiplier

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v

MUL: occupy 2 continuous component,D.MUL: occupy 4 continuous component

[Instruction function and effect declare]

MUL instruction use for In1 multiply by In2 output to out. Out+1,32 bit instruction D.MUL use for (In1. In1+1) multiply by (In2. In2+1),arithmetic result output to (Out. Out+1. Out+2. Out+3).

[Instruction example]

Refer to ADD instruction example.

DIV. D.DIV(Division)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

DIV En, In1, In2, Out

D.DIV En, In1, In2, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In1

Dividend

v

? ?
In2

Divisor

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v

DIV: occupy 2 continuous component,D.DIV: occupy 4 continuous component

[Instruction function and effect declare]

1. 16 bit instruction (DIV), use for In1 divide In2,arithmetic result quotient store to out ,remainder store to out+1.

2. 32 bit instruction (D.DIV), use for (In1. In1+1) divide (In2. In2+1),arithmetic result quotient store to (Out. Out+1),remainder store to (Out+2. Out+3).

[Instruction example]

Refer to ADD instruction example.

ACCU. D.ACCU(Accumulation)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

ACCU En, Sou, N, Out

D.ACCU En, Sou, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

?

ACCU: occupy N continuous component,D.ACCU: occupy 2N continuous component

N

Number of data

v

? 1~256
Eno

Enable output

?

v ?
Out

Output

?

v

ACCU: occupy 2 continuous component,D.ACCU: occupy 4 continuous component

[Instruction function and effect declare]

1. ACCU instruction use for accumulation sum of N 16 bit integer start from Sou ,arithmetic result store to out. Out+1.

2. D.ACCU instruction use for accumulation sum of N 32 bit integer (216 bit register)start from Sou , arithmetic result store to out. Out+1. Out+2. Out+3.

[Instruction example]

[Program description]

When M0=ON,V0V1= V1000+V1001+V1002+V1003,as follows table .

component

Initial value

Arithmetic result

V1000

2702 V0V1 =17839

V1001

16827

V1002

-186

V1003

-1504

AVG. D.AVG(Average)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

AVG En, Sou, N, Out

D.AVG En, Sou, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

?

AVG: occupy N continuous component,D.AVG: occupy 2N continuous component

N

Number of data

v

? 1~256
Eno

Enable output

?

v ?
Out

Output

?

v

AVG: occupy 2 continuous component,D.AVG: occupy 4 continuous component

[Instruction function and effect declare]

1. AVG instruction use for get average value N 16 bit integer start from Sou ,arithmetic result store to out, remainder store to Out+1.

2. D.AVG instruction use for get average value N 32 bit integer (two 16 bit register )start from Sou, arithmetic result store to out. Out+1, remainder store to Out+2. Out+3.

[Instruction example]

[Program description]

When M0=ON,V0= (V1000+V1001+V1002+V1003)\4,as follows table .

component

Initial value

Arithmetic result

V1000

2702 V0=4459,??V1=3

V1001

16827

V1002

-186

V1003

-1504

ABS. D.ABS(Absolute value)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

ABS En, In

D.ABS En, In

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?

[Instruction function and effect declare]

ABS instruction get In absolute value result again store to In.

[Instruction example]

[Program description]

When M0=ON, get V1000. V1001V1002 absolute value, as follows table .

component

Initial value

Absolute value result

V1000

2702 V1000=2702

V1001V1002

-12172869 V1001V1002=12172869

NEG. D.NEG(Two's complement)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

NEG En, In, Out

D.NEG En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

NEG instruction get In two's complement.

[Instruction example]

[Program description]

When M0=ON, get V1000. V1001V1002 two's complement, as follows table .

component

Initial value

Two's complement

V1000

2702 V0=-2702

V1001V1002

-12172869 V2V3=12172869

Floating point instruction


Floating point instruction list as follows

Instruction name 8 bit model 32 bit model Instruction function Support language
LD FBD IL
FCMP ?

?

Floating point comparison

v

v

v

FZCP ?

?

Floating point regional comparison

v

v

v

FMOV ?

?

Floating point move instruction

v

v

v

FADD ?

?

Floating point addition

v

v

v

FSUB ?

?

Floating point subtraction

v

v

v

FMUL ?

?

Floating point multiplication

v

v

v

FDIV ?

?

Floating point division

v

v

v

FACCU ? ?

Floating point accumulation

v

v

v

FAVG ? ?

Floating point average

v

v

v

FMAX ? ?

Floating point maximum

v

v

v

FMIN ? ?

Floating point minimum

v

v

v

FTOI ?

?

Floating point convert to integer

v

v

v

ITOF ?

D.ITOF

Integer convert to floating point

v

v

v

FABS ?

?

Floating point absolute

v

v

v

FSQR ?

?

Floating point square root

v

v

v

FSIN ?

?

Sine

v

v

v

FCOS ?

?

Cosine

v

v

v

FTAN ?

?

Tangent

v

v

v

FASIN ?

?

Arcsine

v

v

v

FACOS ?

?

Arc cosine

v

v

v

FATAN ?

?

Arctangent

v

v

v

FLN ?

?

Natural logarithm

v

v

v

FLOG ?

?

The base-10 logarithm of a number

v

v

v

FEXP ?

?

Nature exponential

v

v

v

FRAD

?

?

Angle convert to radian

v

v

v

FDEG

?

Radian convert to angle

v

v

v

FXY

?

?

Exponent

v

v

v

Haiwell PLC floating point use IEEE754 standard, use 32 bit express floating point (occupy 2 registers), value range is ?-126 to ?+128 also as ?.1755e-38 to ?.4028e+38,format as follows:

FCMP(Floating point comparison)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FCMP En, In1, In2, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In1

Input1

v

? ?
In2

Input2

v

? ?
Out

Status output

?

v Occupy 3 continuous component

[Instruction function and effect declare]

FCMP is floating point comparison instruction, at the same time output >. =. < these 3 result.

[Instruction example]

[Program description]

1. FCMP instruction get electricity from busbar and always execute.

2. When V0V1>23.456 then M10=ON, when V0V1=23.456 then M11=ON, when V0V1<23.456 then M12=ON.

FZCP(Floating point regional comparison)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FZCP En, In, Up, Down, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In

Input

v

? ?
Up

Region upper limit

v

? ?
Down

Region lower limit

v

? ?
Out

Status output

?

v Occupy 3 continuous component

[Instruction function and effect declare]

1. FZCP is floating point regional comparison instruction, at the same time output >. =. < these 3 result.

2. If region upper limit< region lower limit, then instruction automatic swap they .

[Instruction example]

[Program description]

1. FZCP instruction get electricity from busbar and always execute.

2. When V0V1>9876.05 then M10=ON, when V0V1?9876.05 moreover V0V1?-23.12 then M11=ON, when V0V1<-23.12 then M12=ON.

FMOV(Floating point move)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FMOV En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

Floating point move instruction FMOV also name floating point valuation instruction,use for assigned floating point valuate to output register Out.

[Instruction example]

[Program description]

Program first scan valuate initial value,V0V1=35.6,V10V11=-2.632.

FADD(Floating point addition)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FADD En, In1, In2, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In1

Augend

v

? ?
In2

Addend

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

FADD instruction use for floating point In1 add floating point In2 output to out.

[Instruction example]

[Program description]

When M0=ON,excete as follows floating point arithmetic,V0V1= V1000V1001+V1002V1003;V2V3=V1000V1001-V1002V1003;V4V5=V1000V1001* V1002V1003;V6V7=V1000V1001\ V1002V1003,as follows table .

component

Initial value

Arithmetic result

V1000V1001

23.38015 V0V1 =-963.7429
V2V3 =1010.503

V1002V1003

-987.123 V4V5 =-23079.09
V6V7 =-0.02368515

FSUB(Floating point subtraction)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FSUB En, In1, In2, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In1

Minuend

v

? ?
In2

Subtrahend

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

FSUB instruction use for floating point In1 subtracte floating point In2 output to out.

[Instruction example]

Refer to FADD instruction example.

FMUL(Floating point multiplication)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FMUL En, In1, In2, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In1

Multiplicand

v

? ?
In2

Multiplier

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

FMUL instruction use for floating point In1 multiply by floating point In2 output to out.

[Instruction example]

Refer to FADD instruction example.

FDIV(Floating point division)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FDIV En, In1, In2, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
In1

Dividend

v

? ?
In2

Divisor

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

FDIV instruction use for floating point In1 divide floating point In2 output to out.

[Instruction example]

Refer to FADD instruction example.

FACCU(Accumulation)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FACCU En, Sou, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

? ?
N

Number of data

v

? 1~256
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

FACCU instruction use for accumulation sum of N floating point start from Sou ,arithmetic result store to out.

[Instruction example]

[Program description]

When M0=ON,V0V1= V1000V1001+V1002V1003+V1004V1005+V1006V1007,as follows table .

component

Initial value

Arithmetic result

V1000V1001

198.012 V0V1 =316.4277

V1002V1003

23.781

V1004V1005

-3.714

V1006V1007

98.3487

FAVG(Average)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FAVG En, Sou, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

? ?
N

Number of data

v

? 1~256
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

FAVG instruction use for get floating point average value N floating point start from Sou ,arithmetic result store to out.

[Instruction example]

[Program description]

When M0=ON,V0V1= (V1000V1001+V1002V1003+V1004V1005+V1006V1007)\4,as follows table .

component

Initial value

Arithmetic result

V1000V1001

198.012 V0V1=79.10693

V1002V1003

23.781

V1004V1005

-3.714

V1006V1007

98.3487

FMAX(Floating point maximum)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FMAX En, Sou, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

? ?
N

Number of data

v

? 2~256
Eno

Enable output

?

v

?
Out

Compare result output

v ?

[Instruction function and effect declare]

FMAX instruction compare N floating point data start from Sou ,maximum output to Out.

[Instruction example]

[Program description]

1. M0=ON, if V1000V1001=198.012. V1002V1003=23.781. V1004V1005=-3.714. V1006V1007=98.3487, then V0V1=198.012.

2. When M0=OFF, instruction stop execute ,Out remain unchanged.

FMIN(Floating point minimum)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FMIN En, Sou, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

? ?
N

Number of data

v

? 2~256
Eno

Enable output

?

v ?
Out

Compare result output

?

v ?

[Instruction function and effect declare]

FMIN instruction compare N floating point data start from Sou ,minimum output to Out.

[Instruction example]

[Program description]

1. M0=ON, if V1000V1001=198.012. V1002V1003=23.781. V1004V1005=-3.714. V1006V1007=98.3487, then V0V1=-3.714.

2. When M0=OFF, instruction stop execute ,Out remain unchanged.

FTOI(Floating point convert to integer)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FTOI En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

FTOI instruction convert floating point to integer.

[Instruction example]

[Program description]

When M0=ON,FTOI instruction convert floating point V1000V1001 to integer result to V0V1,as follows table .

In component

Initial value

convert result

V1000V1001

-2345.987 V0V1 = -2346

ITOF. D.ITOF(Integer convert to floating point)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 32 bit

Instruction format

ITOF En, In, Out

D.ITOF En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

ITOF instruction convert Integer to floating point.

[Instruction example]

[Program description]

When M0=ON, ITOF instruction convert V1000 to floating point result store to V0V1, convert V1000V1001 to floating point result store to V2V3,as follows table .

In component

Initial value

convert result

V1000

4648 V0V1 = 4648.0

V1000V1001

-257496 V2V3 = -257496.0

FABS(Floating point absolute)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FABS En, In

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?

[Instruction function and effect declare]

FABS instruction get floating point In absolute value result again store to In.

[Instruction example]

[Program description]

When M0=ON, get floating point V1000V1001 absolute value, as follows table .

component

Initial value

Absolute value result

V1000V1001

-23.3456 V1000V1001=23.3456

FSQR(Floating point square root)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FSQR En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

FSQR instruction get floating point square root.

[Instruction example]

[Program description]

When M0=ON, get floating point V1000V1001square root,as follows table .

component

Initial value

Result

V1000V1001

23.3456 V0V1=4.831728

FSIN(Sine)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FSIN En, Angle, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Angle

Angle

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

FSIN instruction get sine of angle.

[Instruction example]

[Program description]

When M0=ON, get sine of floating point V1000V1001, cosine of floating point V1002V1003, tangent of floating point V1004V1005 ,as follows table .

component

Initial value

Result

V1000V1001

30.0 SineV0V1=0.5

V1002V1003

45.0 CosineV2V3=0.7071068

V1004V1005

70.0 TangentV4V5=2.747478

FCOS(Cosine)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FCOS En, Angle, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Angle

Angle

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

FCOS instruction get cosine of angle.

[Instruction example]

Refer to FSIN instruction example.

FTAN(Tangent)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FTAN En, Angle, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Angle

Angle

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

FTAN instruction get tangent of angle.

[Instruction example]

Refer to FSIN instruction example.

FASIN(Arcsine)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FASIN En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? range :-1 ~ 1
Eno

Enable output

?

v ?
Out

Output radian

?

v ?

[Instruction function and effect declare]

FASIN instruction get arcsine of In .InInput range :-1 ~ 1 among, if In exceed range , instruction not execute, Eno=OFF.

[Instruction example]

[Program description]

When M0=ON, get arcsine floating point V1000V1001 , arc cosine of floating point V1002V1003, arc tangent of floating point V1004V1005, as follows table .

component

Initial value

Result

V1000V1001

0.8912 ?SineV0V1=1.099984

V1002V1003

-0.3409 ?CosineV2V3=1.91867

V1004V1005

23.0912 ?TangentV4V5=1.527517

FACOS(Arc cosine)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FACOS En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? range :-1 ~ 1
Eno

Enable output

?

v ?
Out

Output radian

?

v ?

[Instruction function and effect declare]

FACOS instruction get arc cosine of In .InInput range :-1 ~ 1 among , if In exceed range , instruction not execute, Eno=OFF.

[Instruction example]

Refer to FASIN instruction example.

FATAN(Arctangent)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FATAN En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?
Out

Output radian

?

v ?

[Instruction function and effect declare]

FATAN instruction get arc tangent of In.

[Instruction example]

Refer to FASIN instruction example.

FLN(Natural logarithm)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FLN En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

FLN instruction get natural logarithm of In .InInput must greater than 0, no then instruction not execute, Eno=OFF.

[Instruction example]

[Program description]

When M0=ON, get natural logarithm of floating point V1000V1001, the base-10 logarithm of floating point V1002V1003, nature exponential of floating point V1004V1005,as follows table .

component

Initial value

Result

V1000V1001

0.8912 Natural logarithmV0V1=-0.1151864

V1002V1003

3.8912 the base-10 logarithm of V2V3=0.5900835

V1004V1005

2.2398 Nature exponentialV4V5=9.391453

FLOG(The base-10 logarithm of a number)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FLOG En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

FLOG instruction get the base-10 logarithm of In. In Input must greater than 0, no then instruction not execute, Eno=OFF.

[Instruction example]

Refer to FLN instruction example.

FEXP(Nature exponential)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FEXP En, In, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

FEXP instruction get nature exponential of In. In Input must less than 88.72284, no then instruction not execute, Eno=OFF.

[Instruction example]

Refer to FLN instruction example.

FRAD(Angle convert to radian)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FRAD En, Angle, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Angle

Angle

v

? ?
Eno

Enable output

?

v ?
Out

Output radian

?

v ?

[Instruction function and effect declare]

FRAD instruction convert angle to radian.

[Instruction example]

[Program description]

When M0=ON, convert angle V1000V1001to radian, convert radian V1002V1003 to angle, as follows table .

component

Initial value

Result

V1000V1001

30.0 V0V1=0.5235988

V1002V1003

1.57 V2V3=89.95438

FDEG(Radian convert to angle)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FDEG En, In, Angle

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
In

Input radian

v

? ?
Eno

Enable output

?

v ?
Angle

Angle

?

v ?

[Instruction function and effect declare]

FDEG instruction convert radian convert to angle.

[Instruction example]

Refer to FRAD instruction example.

FXY(Exponent)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FXY En, X, Y, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
X

Base number

v

? ?
Y

Exponent

v

? ?
Eno

Enable output

?

v ?
Out

Output

?

v ?

[Instruction function and effect declare]

FXY instruction get X^Y value. If X=0 moreover Y?0 or X<0 moreover Y magnitude portion not equal to 0 instruction not execute, Eno=OFF.

[Instruction example]

[Program description]

When M0=ON, get V1000V1001^V1002V1003 value.

component

Initial value

Result

V1000V1001

30.0 V0V1=208.4877

V1002V1003

1.57

Clock instruction


System clock instruction list as follows

Instruction name 8 bit model 32 bit model Instruction function Support language
LD FBD IL
TCMP

?

Real time clock comparison

v

v

v

TACCU

?

?

Time accumulative total

v

v

v

SCLK

?

?

Setup system clock

v

v

v

TIME

?

?

Time switch

v

v

v

DATE

?

?

Date switch

v

v

v

INVT ?

?

Count down

v

v

v

TCMP(Real time clock comparison)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

TCMP En, Clock, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Clock

Clock compare start component

v

?

Occupy 6 continuous component

Out

Status output

?

v

Occupy 3 continuous component

[Instruction function and effect declare]

1. TCMP use for compare system real time clock and clock setup clock ,if system real time clock >clock output>state, if system real time clock =clock output=state, if system real time clock output

2. Clock occupy 6 registers, respectively is year(0~9999). month(1~12). data(1~31). time(0~23). minute(0~59). second(0~59). if year set in 0~99 range , system default is 2000~2099 year.

3. If clock is invalid time, instruction not execute.

[Instruction example]

[Program description]

1. TCMP instruction get electricity from busbar and always execute.

2. If V1000=2012. V1001=12. V1002=25. V1003=8. V1004=0. V1005=0, express setting time is 2012-12-25 8:0:0.

3. System clock exit in SV12~SV18, when system real time clock >Clock then M10=ON, when system real time clock =clock then M11=ON, when system real time clock

TACCU(Time accumulative total)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

TACCU En, Rst, CT

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Rst

Reset

v

? ?
Eno

Enable output

?

v ?
CT

Accumulative time

?

v

Occupy 6 continuous component

[Instruction function and effect declare]

1. TACCU instruction according to second unit accumulative En=ON time, output total accumulative second(CT. CT+1) and accumulative data (CT+2). hour(CT+3). minute(CT+4). second(CT+5) relative to the accumulative second.

2. Accumulative time CT must use power-off preserve area register, default power-off preserve registers are V1000~V2047.

3. After accumulative second(CT. CT+1) reach maximum value 2147483647 automatic reset to 0.

[Instruction example]

[Program description]

1. Network 1 get electricity from busbar , that is accumulative PLC running time .

2. Network 2 If X0 is equipmentx running feedback signal ,X0=ON, TACCU execute timing ,X0=OFF then not timing.

SCLK(Setup system clock)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

SCLK En, Clock

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Clock

Clock data start component

v

?

Occupy 6 continuous component

Eno

Enable output

?

v ?

[Instruction function and effect declare]

1. SCLK instruction modify the PLC real time clock by the set clock data .

2. Clock occupy 6 register, respectively is year(0~9999). month(1~12). data(1~31). hour(0~23). minute(0~59). second(0~59). if year set in0~99 range , system default is 2000~2099 year.

3. If clock is invalid time, instruction not execute.

4. SCLK instruction executed by edge.

5. Also can modify by program software menu[PLC/ set PLC clock], must not program. refer to "set PLC clock"

[Instruction example]

[Program description]

1. If V1000=2012. V1001=12. V1002=25. V1003=8. V1004=0. V1005=0, express setting time is 2012-12-25 8:0:0.

2. When M0=ON,PLC system clock setup is 2012-12-25 8:0:0.

TIME(Time switch)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

TIME En, OnTime, OffTime, Act, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
OnTime

ON actuation time

v

? ?
OffTime

OFF actuation time

v

? ?
Act

Control model

v

? ?
Out Status output

?

v ?

[Instruction function and effect declare]

1. TIME instruction use week as control cycle, get by set ON. OFF actuation time control output.

2. Act is control model, it bits b0~b6 respectively are express monday~sunday control model, when it relevant bit is1 then express the data ON. OFF actuation time is valide, is 0 then express the data not actuation.

3. If ON actuation time <OFF actuation time , express in current data ON and OFF. if ON actuation time >OFF actuation time , express cross-day ON and OFF.

4. Ontime. Offtime if is register input, then high byte is hour(0~23) low byte is minute(0~59);if is constant input, input format is :hh:mm(as 8 clock 5 minute,input 08:05).

5. If Ontime is invalid time then ON actuation invalid. If Offtime is invalid time then OFF actuation invalid.

[Instruction example]

[Program description]

Act=127(01111111) express monday ~sunday valid, when M0=ON,TIME instruction execute, every day 8:30~16:30 among Y0=ON, others timeY0=OFF.

DATE(Date switch)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

DATE En, OnDate, OffDate, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
OnDate

ON actuation data

v

? ?
OffDate

OFF actuation data

v

? ?
Out

Status output

?

v ?

[Instruction function and effect declare]

1. DATE instruction use year as control cycle, get by ON. OFF actuation time control output.

2. If ON actuation data <OFF actuation data , express in current year ON and OFF. if ON actuation data >OFF actuation data , express in cross-year ON and OFF.

3. OnDate. OffDate if is register input, then high byte is month(1~12) low byte is data(1~31); if is constant input, input format is :mm-dd(as august 5,Input 08-05).

4. If OnDate is invalid data then ON actuation invalid. If OffDate is invalid data then OFF actuation invalid .

[Instruction example]

[Program description]

When M0=ON ,DATE instruction executing, from current year august 1to next year january 31Y0=ON, others time Y0=OFF.

INVT(Count down)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

INVT En, Clock, Out, Rtv

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Clock

Count down start time component

v

?

Occupy 6 continuous component

Out

Count down to output

?

v ?
Rtv

Remaining time

?

v

Occupy 4 continuous component

[Instruction function and effect declare]

1. INVT instruction according to set count down time clock calculate from current value to set time still remaining data(Rtv). hour(Rtv+1). minute(Rtv+2). second(Rtv+3),when reach the timing time output Out.

2. Clock occupy 6 registers ,respectively year(0~9999). month(1~12). data(1~31). time(0~23). minute(0~59). second(0~59). if year set in 0~99 range , system default as 2000~2099 year.

3. if Clock is invalid time, instruction not execute.

[Instruction example]

[Program description]

1. If V1000=2013. V1001=12. V1002=25. V1003=8. V1004=0. V1005=0, express set count down time is 2013-12-25 8:0:0.

2. When M0=ON,INVT instruction start count down, automatic calculate from current value to 2013-12-25 8:0:0 remaining data. hour. minute. second, after timing time reach output Y0=ON.

Communication instruction


Communication instruction list as follows

Instruction name 8 bit model 32 bit model Instruction function Support language
LD FBD IL
SUM

SUM.LB

?

SUM verify

v

v

v

BCC

BCC.LB

?

BCC verify

v

v

v

CRC

CRC.LB

?

CRC verify

v

v

v

LRC

LRC.LB

?

LRC verify

v

v

v

COMM

COMM.LB

?

Serial communications

v

v

v

MODR ?

?

Modbus read

v

v

v

MODW ?

?

Modbus write

v

v

v

HWRD ?

?

Haiwellbus read

v

v

v

HWWR ?

?

Haiwellbus write

v

v

v

RCV ?

?

Receive communication data

v

v

v

XMT XMT.LB

?

Sent communication data

v

v

v

FROM

?

?

Extend module CR register read

v

v

v

TO ?

?

Extend module CR register write

v

v

v

TCPMDR ?

?

Modbus TCP read

v

v

v

TCPMDW ?

?

Modbus TCP write

v

v

v

TCPHWR ?

?

Haiwellbus TCP read

v

v

v

TCPHWW ?

?

Haiwellbus TCP write

v

v

v

Note:Haiwell PLC support standard Modbus protocol. Haiwellbus protocol. freedom communication protocol, PLC use as slave no need any communication program, upper computer (configuration software. touch panel. text display etc. HMI) can direct use Modbus protocol access Haiwell PLC. refer to " communication address code table "

Haiwell PLC communication main features :

1. Haiwellbus protocol is a efficient . high speed communication protocol, support disperse . blended data transfer, communication efficient very well.

2. Haiwell PLC support maximum 5 communication port, the same function of all communication port , all can use for program . upload download program. monitor . networking.

3. 5 communication port fully independent , concurrent working , support different different baud rate . different protocol format . different manufacturer equipment connected in same network.

4. Need not worry about communication port collision problem, need not control communication instruction execute time sequence ,all communication instruction can concurrent get electricity execute.

5. Via communication instruction Out item can intuitive judgment communicate succeed or not , can use it for alarm the communicate fail between slave.

6. Haiwell PLC communication is zero spare on network physics level , if slave equipment not support so high speed communication, can assigned SV141 to insert a interval among the communication instruction.

SUM. SUM.LB(SUM verify)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 8 bit

Instruction format

SUM En, Sou, N, Out

SUM.LB En, Sou, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

?

SUM: occupy (N+1)\2 continuous component,SUM.LB: occupy N continuous component

N

Verify number of bytes

v

? 1~256
Eno

Enable output

?

v ?
Out

SUM verify code output

?

v ?

[Instruction function and effect declare]

Sum verify code computing method: use for get accumulation sum start from Sou N number of bytes , get low byte, exceed 256 part overflow.SUM.LB is Low byte model, only calculate sum verify code of low byte, high byte notuse .

[Instruction example]

[Program description]

When M0=ON, calculate SUM verify code, as follows table .

Sou component

Initial value

SUM Output

SUM.LB Output

V1000

0x8181

V0=0xB3

V2=0x30

V1001

0x0152

V1002

0x0000

V1003

0x0153

V1004

0x0D0A

BCC. BCC.LB(BCC verify)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 8 bit

Instruction format

BCC En, Sou, N, Out

BCC.LB En, Sou, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

?

BCC: occupy (N+1)\2 continuous component,BCC.LB: occupy N continuous component

N

verify sumber of bytes

v

? 1~256
Eno

Enable output

?

v ?
Out

BCC code output

?

v ?

[Instruction function and effect declare]

BCC verify code computing method: use for XOR operation start from Sou N Number of bytes .BCC.LB is Low byte model, only calculate low byte BCC verify code, high byte not use.

[Instruction example]

[Program description]

When M0=ON, calculate BCC verify code, as follows table .

Sou component

Initial value

BCC Output

BCC.LB Output

V1000

0x8181

V0=0xB

V2=0x8A

V1001

0x0152

V1002

0x0000

V1003

0x0153

V1004

0x0D0A

CRC. CRC.LB(CRC verify)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 8 bit

Instruction format

CRC En, Sou, N, Out

CRC.LB En, Sou, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

?

CRC: occupy (N+1)\2 continuous component,CRC.LB: occupy N continuous component

N

Verify number of bytes

v

? 1~256
Eno

Enable output

?

v ?
Out

CRC code output

?

v ?

[Instruction function and effect declare]

CRC calculate CRC verify code start from Sou N number of bytes .CRC.LB is Low byte model, only calculate low byte CRC verify code, high byte not use.

[Instruction example]

[Program description]

When M0=ON, calculate CRC verify code, as follows table .

Sou component

Initial value

CRC Output

CRC.LB Output

V1000

0x8181

V0=0x98AC

V2=0xB4

V3=0x51

V1001

0x0152

V1002

0x0000

V1003

0x0153

V1004

0x0D0A

LRC. LRC.LB(LRC verify)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 8 bit

Instruction format

LRC En, Sou, N, Out

LRC.LB En, Sou, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Sou

Source start component

v

?

LRC: occupy (N+1)\2 continuous component,LRC.LB: occupy N continuous component

N

Verify number of bytes

v

? 1~256
Eno

Enable output

?

v ?
Out

LRC code output

?

v ?

[Instruction function and effect declare]

LRC verify code computing method: use for get accumulation sum start from Sou N number of bytes and then O 2's complement code. LRC.LB is low byte model, only calculate low byte LRC verify code, high byte not use.

[Instruction example]

[Program description]

When M0=ON, calculate LRC verify code,as follows table .

Sou component

Initial value

LRC Output

LRC.LB Output

V1000

0x8181

V0=0xFE4D

V2=0xD0

V3=0xFE

V1001

0x0152

V1002

0x0000

V1003

0x0153

V1004

0x0D0A

COMM. COMM.LB(Serial communications)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 8 bit

Instruction format

COMM En, Txd, Tn, Rn, Ptotocol, Port, Out, Err, Rxd

COMM.LB En, Txd, Tn, Rn, Ptotocol, Port, Out, Err, Rxd

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Txd

Send data start component

v

? ?
Tn

Send data number of bytes

v

? 0~512
Rn

Receive data number of bytes

v

0~512
Protocol

Communication protocol

v

? ?
Port

Communication port

v

? ?
Out

Communication complete output

? v ?
Err

Error indication

?

v ?
Rxd

Receive data start component

?

v ?

[Instruction function and effect declare]

1. When PLC communicate in freedom protocol between external equipment,use COMM instruction send and receive data .At the moment PLC is master, external equipment is slave.

2. When Tn=0 ,COMM instruction only receive data without send data .When Rn=0 ,COMM instruction only send data without receive data .When Tn=Rn=0 ,COMM instruction not execute.

3. COMM instruction executing, in accordance with protocol defined communication format ( baud rate . data bit . stop bit . verification mode) use for Txd start Tn number of bytes data send to Port assigned serial port ,after send complete , if Rn>0 then automatic go to receive state, receive complete Out=ON, received data put on Rxd; if Rn=0 then not receive data Out=ON, system execute next communication instruction. if communication instruction not complete then Err=ON.

4. COMM instruction have two modes send data: high low byte send mode (COMM) and only send low byte mode (COMM.LB)

5. COMM instruction can use with XMT. MODR. MODW. HWRD. HWWR instruction at the same time .but can not use the same communication port with RCV instruction .

[Instruction example]

[Program description]

1. According to AI-708M itinerant detector communication protocol ,read 3 channel measure value from AI-708M itinerant detector communication instruction put on initial register value table " read AI-708M itinerant detector command" :

component

Initial value

Declare

V1000

0x8383

First channel read command

V1001

0x0152

V1002

0x0000

V1003

0x0155

V1004

0x8484

Second channel read command

V1005

0x0152

V1006

0x0000

V1007

0x0156

V1008

0x8585

Third channel read command

V1009

0x0152

V1010

0x0000

V1011

0x0157

2. 3 COMM instruction get electricity from busbar and always execute, PLC automatic in sequence send communication command to AI-708M itinerant detector moreover use for returned measure value output to instruction Rxd.

3. Do not warry about communication port conflict , do not control communication instruction executed time sequence , system automatic executed completely .

MODR(Modbus read)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

MODR En, Slave, Code, Read, N, Ptotocol, Port, Out, Rxd

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Slave

Slave equipment address

v

? ?
Code

Function code

v

? ?
Read

Read data start address

v

? ?
N

Number of data

v

1~127
Protocol

Communication protocol

v

? ?
Port

Communication port

v

? ?
Out

Communication complete Output

?

v ?
Rxd

Receive data start component

?

v Occupy N continuous component

[Instruction function and effect declare]

1. MODR instruction use for communication with all the third party equipment are support Modbus protocol.

2. When PLC communication with external equipment by the serial port ,use MODR instruction read data from external equipment . This moment PLC as master ,external equipment as slave.

3. MODR instruction do not write any verify code, it automatic verified the returned data ,verify correct Out=ON, read data put on Rxd.

4. MODR instruction can use with COMM . XMT. MODW. HWRD. HWWR instruction at the same time .but can not use the same communication port with RCV instruction.

[Instruction example]

[Program description]

1. MODR instruction read station 1 external module (If module is S04AI) 4 channel measured value (CR Parameter no.16~19), read data store to V0~V3.

2. Different model module the CR number not the same, detail information refer to Hardware manual" extend module Parameter" section.

MODW(Modbus write)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

MODW En, Slave, Code, Write, Val, N, Ptotocol, Port, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Slave

Slave equipment address

v

? ?
Code

Function code

v

? ?
Write

Write target start address

v

? ?
Val

Be rote data start component

v

Occupy N continuous component
N

Number of data

v

? 1~127
Protocol

Communication protocol

v

? ?
Port

Communication port

v

? ?
Out

Communication complete Output

?

v ?

[Instruction function and effect declare]

1. MODW instruction use for communication with all the third party equipment are support Modbus protocol.

2. When PLC communication with external equipment by the serial port ,use MODW instruction write data to external equipment . This moment PLC as master ,external equipment as slave Modbus .

3. MODW instruction do not write any verify code, it automatic verified the returned data ,verify correct Out=ON express write succeed.

4. MODW instruction can use with COMM . XMT. MODR. HWRD. HWWR instruction at the same time .but can not use the same communication port with RCV instruction.

[Instruction example]

[Program description]

1. According to inovance inverter communication protocol ( please refer to inovance inverter manual part of communication), preset frequency Modbus address is 4096,MODW instruction write V80 value to inverter real time.

2. Running frequency Modbus address is 4097,MODR instruction read the current frequency of the inverter store to V82 .

HWRD(Haiwellbus read)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

HWRD En, Slave, Table, Port, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Slave

Slave equipment address

v

? ?
Table

Haiwellbus read communication table

v

? ?
Port

Communication port

v

? ?
Out

Communication complete Output

?

v ?

[Instruction function and effect declare]

1. HWRD instruction according to defined " Haiwellbus read communication table" automatic swap the data with slave .

2. Haiwellbus protocol support disperse . blended data transfer, communication efficient very well.

3. HWRD instruction can use with COMM . XMT. MODR. MODW. HWWR instruction at the same time .but can not use the same communication port with RCV instruction .

[Instruction example]

[Program description]

1. Define Haiwellbus read communication table " read 2# PLC data "as follows:

Sequence number

Read data from slave

Write date to slave

1

X0

M10

2

X3 M11

3

V11

V80

4

V12

V81

5

AI0

V20

6

AI1

V21

2. Define Haiwellbus write communication table " write 2# PLC data "as follows:

Sequence number

Read data from slave

Write date to slave

1

X0

M100

2

X1 M101

3

V0

V100

4

V50

V102

5

Y4

M0

6

Y5

Y0

7

V60

V200

8

V61

V201

3. HWRD. HWWR instruction get electricity from busbar and always execute, according above define Haiwellbus read (write) communication table ,automatic swap data with 2#PLC .

HWWR(Haiwellbus write)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

HWWR En, Slave, Table, Port, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Slave

Slave equipment address

v

? ?
Table

Haiwellbus write communication table

v

? ?
Port

Communication port

v

? ?
Out

Communication complete Output

?

v ?

[Instruction function and effect declare]

1. HWWR instruction according to define " Haiwellbus write communication table" automatic swap data with slave.

2. Haiwellbus protocol support disperse . blended data transfer, communication efficient very well.

3. HWWR instruction can use with COMM . XMT. MODR. MODW. HWRD instruction at the same time .but can not use the same communication port with RCV instruction .

[Instruction example]

Refer to HWRD instruction example.

RCV(Receive communication data)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

RCV En, Schr, Echr, Rn, Ptotocol, Port, Out, Rxd

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Schr

start character

v

? ?
Echr

ending character

v

? ?
Rn

Receive data Number of bytes

v

0~512
Protocol

Communication protocol

v

? ?
Port

Communication port

v

? ?
Out

Communication complete Output

?

v ?
Rxd

Receive data start component

?

v ?

[Instruction function and effect declare]

1. At upper computer is communication master ,PLC is communication slave , moreover upper computer must use freedom communication protocol need use RCV instruction.

2. RCV instruction passive receiving data sent from upper computer , if need response to upper computer then use XMT instruction sent the response data.

3. Schr is start character define, if Schr=0 express no start character, if Schr high byte=0 low byte<>0 express only one start character (e.x.Schr=0x003A,start character is 0x3A), if Schr high byte<>0 express2start character (e.x. Schr=0x833A,start character is 0x3A. 0x83).

4. Echr is ending character define, if Echr=0 express no ending character, if Echr high byte=0 low byte<>0 express only one ending character (e.x. Echr=0x000D, ending character is 0x0D), if Echr high byte<>0 express2 ending character (e.x. Echr=0x0A0D, ending character is 0x0D. 0x0A).

5. If define start character or ending character ,RCV according to start character. ending character process match , only match correct express communication succeed , receive data output to Rxd;When Schr and Echr all is 0,that is start character and ending character all not define, then RCV instruction use for according to communication port communicate overtime to judge the start end of the communication frame .When receive the first byte of a new frame or communicate overtime RCV instruction will automatic reset Out and Rxd.

6. Rn is receive data number of bytes, e.x. :RCV instruction want receive 22 bytes send from upper computer , then assign Rn=22.Note: if the length of the command send from upper computer not fixed, then use for receive number of bytes define to 0, express disregard receive number of bytes.

7. One communication port only use one RCV instruction, moreover use with COMM. MODR. MODW. HWRD. HWWR instructionuse at the same communication port .

[Instruction example]

[Program description]

1. Network 1 start one RCV passive receiving instruction, start character match 0x3A, ending character match 0x0D 0x0A, receive 4 number of bytes, communication format 19200,n,8,2, communication port 2,receive data put on V0V1,receive data correct then each communicate M0=ON.

2. When M0=ON receive data correct, compare second byte (V0 high byte), if equal to 1 then execute XMT instruction return V1000V1001 , if equal to 2 then execute XMT instruction return V100~V102, if equal to 3 then execute XMT instruction return V200~V203.

XMT. XMT.LB(Sent communication data)

Instruction format and parameter specification

Language LD FBD IL Program example

16. 8 bit

Instruction format

XMT En, Txd, Tn, Ptotocol, Port, Out

XMT.LB En, Txd, Tn, Ptotocol, Port, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Txd

Send data start component

v

?
Tn

Send data Number of bytes

v

? 0~512
Protocol

Communication protocol

v

? ?
Port

Communication port

v

? ?
Out

Communication complete Output

?

v ?

[Instruction function and effect declare]

1. At upper computer is communication master ,PLC is communication slave , moreover upper computer must use freedom communication protocol need use XMT instruction.

2. XMT instruction general use for cooperate RCV instruction , RCV instruction receive data send from upper computer , if need response to upper computer then use XMT instruction send response data.

3. XMT instruction have two send modes :high low byte send mode (XMT) and only send low byte mode (XMT.LB).

4. XMT instruction can repeat ,XMT instruction different from COMM instruction ,it only can send data can not receive data .

[Instruction example]

Refer to RCV instruction example.

FROM(Extend module CR register read)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

FROM En, Slot, CR, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
Slot

Module position number

v

?
Cr

CR register be read

v

? ?
N

Number of CR be read

v

? 1~120
Eno

Enable output

?

v ?
Out

Return start component

?

v Occupy N continuous component

[Instruction function and effect declare]

1. FROM use for read extend module parameter get by parallel bus in program .

2. PLC automatic allocation extend module IO channel corresponding component address on parallel bus, moreover real time refresh IO of extend module , so general not use FROM instruction.detail refer to " PLC hardware configure " section.

3. Different model extend module CR register not the same ,detail refer to hardware manual " extend module parameter" section.

[Instruction example]

[Program description]

1. When M0=ON, read first extend module (if module model is S04AI) 4 Input channel measure value .

2. When M1=ON, modify the zero point corrected value to 30 (If V1000=30)of first channel of the extend module .

TO(Extend module CR register write)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

TO En, Slot, CR, Val, N

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
Slot

Module position number

v

? ?
Cr

CR register be wrote

v

? ?
Val

Data start component be wrote

v

? Occupy N continuous component
N

Number of CR be wrote

v

? 1~120
Eno

Enable output

?

v ?

[Instruction function and effect declare]

1. TO use for write extend module parameter get by parallel bus in program. May " PLC hardware configure" window configure module parameter, when PLC program be downloaded automatic download ,So general need not use TO instruction.

2. Different model extend module CR register not the same ,detail refer to hardware manual " extend module parameter" section.

[Instruction example]

Refer to FROM instruction example.

TCPMDR(Modbus TCP read)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

TCPMDR En, IP, Code, Read, N, Out, Rxd

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
IP

Slave equipment IP address

v

? ?
Code

Function code

v

? ?
Read

Read data start address

v

? ?
N

Number of data

v

1~127
Out

Communication complete Output

?

v ?
Rxd

Receive data start component

?

v Occupy N continuous component

[Instruction function and effect declare]

TCPMDR instruction is used for reading the data of the device supporting Modbus TCP protocol.

[Instruction example]

[Program description]

1. TCPMDR instruction will read the four channels' measurement value (CR parameters No. 16 to 19) of the remote module of the IP address 192.168.1.111 (assume that the module type is S04AI-e), and then the reading data will be stored in V0 ~ V3.

2. Different model module the CR number not the same, detail information refer to Hardware manual" extend module Parameter" section.

TCPMDW(Modbus TCP write)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

TCPMDW En, IP, Code, Write, Val, N, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

? ?
IP

Slave equipment IP address

v

? ?
Code

Function code

v

? ?
Write

Write target start address

v

? ?
Val

Be rote data start component

v

Occupy N continuous component
N

Number of data

v

? 1~127
Out

Communication complete Output

?

v ?

[Instruction function and effect declare]

TCPMDW instruction writes the data to the device supporting the Modbus TCP protocol.

[Instruction example]

[Program description]

1. TCPMDW instruction writes the data V0 ~ V3 to the four output channels (CR parameters No. 16 to 19) of the remote module of the IP address 192.168.1.111(assume that the module type is S04AO-e).

2. Different model module the CR number not the same, detail information refer to Hardware manual" extend module Parameter" section.

TCPHWR(Haiwellbus TCP read)

Instruction format and parameter specification

Language LD FBD IL Program example

Instruction format

TCPHWR En, IP, Table, Out

Download

?

Parameter Parameter define Input Output Declare
En

Enable

v

?
IP